[PATCH] D63669: [RISCV] Allow parsing dot '.' in assembly

[Sam Elliott via Phabricator via llvm-commits]

lenary requested changes to this revision.
lenary added a comment.
This revision now requires changes to proceed.

Ok, after further discussion, I'm not sure about the test coverage of this change.

1. The tests you've added should probably go with the other tests of the `j` instruction in `llvm/test/MC/RISCV/rvi-aliases-valid.s` (and should match the others in that file).
2. Please add a test of `jalr %lo(.)` to `rv32i-valid.s`. This will test that `.` can go in more complex places, and is not an instruction alias.
3. Please add a test to `rv32i-aliases-invalid.s` to test something like `addi x1, .` which will show what happens if someone provides `.` as an immediate somewhere that doesn't make sense.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63669/new/

https://reviews.llvm.org/D63669