[PATCH] D64090: [Codegen][X86][AArch64][ARM][PowerPC] Inc-of-add vs sub-of-not (PR42457)

[Eli Friedman via Phabricator via llvm-commits]

efriedma added inline comments.


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Comment at: test/CodeGen/ARM/inc-of-add.ll:528
+; THUMB6-NEXT:    sbcs r3, r4
+; THUMB6-NEXT:    pop {r4, r5, r7, pc}
 ;
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Before we treat vectors differently from scalars, should we check the vector is actually legal?

In this case, we actually save an instruction (Thumb1 doesn't support adc with immediate), but that seems unintended.


Repository:
  rL LLVM

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  https://reviews.llvm.org/D64090/new/

https://reviews.llvm.org/D64090