[llvm] r364953 - [X86] getTargetConstantBitsFromNode - remove unnecessary getZExtValue() (PR42486)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 2 11:20:38 PDT 2019
Author: rksimon
Date: Tue Jul 2 11:20:38 2019
New Revision: 364953
URL: http://llvm.org/viewvc/llvm-project?rev=364953&view=rev
Log:
[X86] getTargetConstantBitsFromNode - remove unnecessary getZExtValue() (PR42486)
Don't use APInt::getZExtValue() if you can avoid it - eventually someone will call it with i128 or something that doesn't fit into 64-bits.
In this case it was completely superfluous as we'd moved the rest of the code to always use APInt.
Fixes the <1 x i128> addition bug in PR42486
Added:
llvm/trunk/test/CodeGen/X86/i128-add.ll
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=364953&r1=364952&r2=364953&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Jul 2 11:20:38 2019
@@ -5873,8 +5873,7 @@ static bool getTargetConstantBitsFromNod
if (UndefEltBits.getBoolValue() && !AllowPartialUndefs)
return false;
- APInt Bits = MaskBits.extractBits(EltSizeInBits, BitOffset);
- EltBits[i] = Bits.getZExtValue();
+ EltBits[i] = MaskBits.extractBits(EltSizeInBits, BitOffset);
}
return true;
};
Added: llvm/trunk/test/CodeGen/X86/i128-add.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/i128-add.ll?rev=364953&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/i128-add.ll (added)
+++ llvm/trunk/test/CodeGen/X86/i128-add.ll Tue Jul 2 11:20:38 2019
@@ -0,0 +1,88 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64
+
+define i128 @add_i128(i128 %x, i128 %y) nounwind {
+; X86-LABEL: add_i128:
+; X86: # %bb.0:
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: addl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: adcl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: adcl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: addl $1, %esi
+; X86-NEXT: adcl $0, %edi
+; X86-NEXT: adcl $0, %edx
+; X86-NEXT: adcl $0, %ecx
+; X86-NEXT: movl %esi, (%eax)
+; X86-NEXT: movl %edi, 4(%eax)
+; X86-NEXT: movl %edx, 8(%eax)
+; X86-NEXT: movl %ecx, 12(%eax)
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: retl $4
+;
+; X64-LABEL: add_i128:
+; X64: # %bb.0:
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: addq %rdx, %rax
+; X64-NEXT: adcq %rcx, %rsi
+; X64-NEXT: addq $1, %rax
+; X64-NEXT: adcq $0, %rsi
+; X64-NEXT: movq %rsi, %rdx
+; X64-NEXT: retq
+ %t0 = add i128 %x, 1
+ %t1 = add i128 %y, %t0
+ ret i128 %t1
+}
+
+; PR42486
+define <1 x i128> @add_v1i128(<1 x i128> %x, <1 x i128> %y) nounwind {
+; X86-LABEL: add_v1i128:
+; X86: # %bb.0:
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: addl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: adcl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: adcl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: subl $-1, %esi
+; X86-NEXT: sbbl $-1, %edi
+; X86-NEXT: sbbl $-1, %edx
+; X86-NEXT: sbbl $-1, %ecx
+; X86-NEXT: movl %esi, (%eax)
+; X86-NEXT: movl %edi, 4(%eax)
+; X86-NEXT: movl %edx, 8(%eax)
+; X86-NEXT: movl %ecx, 12(%eax)
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: retl $4
+;
+; X64-LABEL: add_v1i128:
+; X64: # %bb.0:
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: addq %rdx, %rax
+; X64-NEXT: adcq %rcx, %rsi
+; X64-NEXT: movq %rax, %xmm0
+; X64-NEXT: movq %rsi, %xmm1
+; X64-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
+; X64-NEXT: movq %xmm0, %rdx
+; X64-NEXT: addq $1, %rax
+; X64-NEXT: adcq $0, %rdx
+; X64-NEXT: retq
+ %t0 = add <1 x i128> %x, <i128 1>
+ %t1 = add <1 x i128> %y, %t0
+ ret <1 x i128> %t1
+}
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