[PATCH] D63963: [Codegen][SelectionDAG] X u% C == 0 fold: non-splat vector improvements

Roman Lebedev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 2 05:12:08 PDT 2019


lebedev.ri added inline comments.


================
Comment at: lib/CodeGen/SelectionDAG/TargetLowering.cpp:4594
+                                    DAG.getConstant(0, DL, ShSVT));
+    }
+
----------------
RKSimon wrote:
> Is this code really necessary? Can't you just use SetCC/Select like we do in the BuildDIV methods? SimplifyDemandedBits/SimplifyDemandedVectorElts are more likely to deal with it then.
This is absolutely *NOT* *necessary*.
The fold is still fully correct without this `if (HadOneDivisor)` block
(and without corresponding ` if (D.isOneValue())` block).

There is no correctness reason to add any extra nodes if we had `1` divisor,
therefore less nodes == better.

The only thing this does is what it looks like - for the channel where the divisor was `1`,
we don't care what multiplier and shift amounts will be, therefore if we can make those
constant vectors a splats, we should be better off that way.

I can totally drop this splatting :)


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63963/new/

https://reviews.llvm.org/D63963





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