[PATCH] D52165: [RISCV] Support RISC-V in getBitcodeMachineKind

[Kito Cheng via Phabricator via llvm-commits]

kito-cheng updated this revision to Diff 207474.
kito-cheng added a comment.
Herald added subscribers: Jim, jocewei, dexonsmith, the_o, brucehoult, MartinMosbeck, steven_wu, edward-jones, zzheng, niosHD, sabuasal, apazos, simoncook, johnrusso, rbar, asb.

Add 2 test cases.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D52165/new/

https://reviews.llvm.org/D52165

Files:
  ELF/InputFiles.cpp
  test/ELF/lto/riscv32.ll
  test/ELF/lto/riscv64.ll


Index: test/ELF/lto/riscv64.ll
===================================================================
--- /dev/null
+++ test/ELF/lto/riscv64.ll
@@ -0,0 +1,10 @@
+; REQUIRES: riscv
+
+; RUN: llvm-as %s -o %t.o
+; RUN: ld.lld %t.o -o %t
+target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"
+target triple = "riscv64-unknown-elf"
+
+define void @f() {
+  ret void
+}
Index: test/ELF/lto/riscv32.ll
===================================================================
--- /dev/null
+++ test/ELF/lto/riscv32.ll
@@ -0,0 +1,10 @@
+; REQUIRES: riscv
+
+; RUN: llvm-as %s -o %t.o
+; RUN: ld.lld %t.o -o %t
+target datalayout = "e-m:e-p:32:32-i64:64-n32-S128"
+target triple = "riscv32-unknown-elf"
+
+define void @f() {
+  ret void
+}
Index: ELF/InputFiles.cpp
===================================================================
--- ELF/InputFiles.cpp
+++ ELF/InputFiles.cpp
@@ -1402,6 +1402,9 @@
   case Triple::ppc64:
   case Triple::ppc64le:
     return EM_PPC64;
+  case Triple::riscv32:
+  case Triple::riscv64:
+    return EM_RISCV;
   case Triple::x86:
     return T.isOSIAMCU() ? EM_IAMCU : EM_386;
   case Triple::x86_64:


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