[PATCH] D63707: [AArch64] Define ETE and TRBE system registers
Momchil Velikov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 1 04:03:11 PDT 2019
chill added a comment.
In D63707#1564007 <https://reviews.llvm.org/D63707#1564007>, @ostannard wrote:
> > ETE shares most of the system registers with ETM and these were historically unconditionally enabled in LLVM.
> I don't think this matters here - existing registers can stay as they are, and the new subtarget features should just cover new registers.
>> It would be inconsistent to add a command line option, which enables just the few extra ETE registers
>
> I don't see why this would be inconsistent, we now add subtarget features for every other new optional architectural feature. Maybe we should add a feature for ETM if it is optional, but that doesn't affect this patch.
ETE is not an extension over or a next version of ETM - it's a completely standalone extension that happens to share with ETM many register names and encodings, but not necessarily register semantics.
I don't think it's logical for any extension to have a mix of conditional/unconditional availability of registers - either all registers should be unconditionally available,
or all registers should be behind a target feature and a command line option. But making all of the ETE registers conditional on a target feature would affect that set of ETM registers that
have the same name and encoding, breaking compatibility.
>> or it would break existing builds if we were to explicitly enable ETM registers.
>
> Do you mean if we were to make ETM off by default? Agreed, we shouldn't do that.
Yes, exactly, I meant "if we were to require explicitly enabling ETM registers".
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D63707/new/
https://reviews.llvm.org/D63707
More information about the llvm-commits
mailing list