[PATCH] D63707: [AArch64] Define ETE and TRBE system registers

Oliver Stannard (Linaro) via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 1 01:58:54 PDT 2019


ostannard requested changes to this revision.
ostannard added a comment.
This revision now requires changes to proceed.

This needs a subtarget feature so that it isn't enabled for targets which don't have the extension.



================
Comment at: llvm/lib/Target/AArch64/AArch64SystemOperands.td:1473
+// Trace Buffer Extension System registers
+class TRBE_RWSysReg<string Name, bits<3> Op2> : RWSysReg<Name, 0b11, 0b000, 0b1001, 0b1011, Op2>;
+class TRBE_ROSysReg<string Name, bits<3> Op2> : ROSysReg<Name, 0b11, 0b000, 0b1001, 0b1011, Op2>;
----------------
I don't think these classes add anything, it would be better to stick to the pattern used elsewhere in this file. If you want to reduce the line lengths, we don't really need the comments with the register descriptions - all we care about in LLVM is the assembly name and the encoding.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63707/new/

https://reviews.llvm.org/D63707





More information about the llvm-commits mailing list