[PATCH] D63973: [MachineVerifier] Improve checks of target instructions operands.

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: lib/CodeGen/MachineVerifier.cpp:1511
+    // Check that a target instruction has register operands only as expected.
+    if (!TII->isGenericOpcode(MO->getParent()->getOpcode())) {
+      if (MCOI.OperandType == MCOI::OPERAND_REGISTER &&
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Do you really need this check? I would expect this to work naturally with generic instruction operands


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Comment at: test/MachineVerifier/verify-targetops.mir:1
+# RUN: not llc -march=x86 -o - %s -start-after=finalize-isel -verify-machineinstrs \
+# RUN:   2>&1 | FileCheck %s
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This doesn't need to run most of the passes, just the verifier with -run-pass=none


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Comment at: test/MachineVerifier/verify-targetops.mir:3
+# RUN:   2>&1 | FileCheck %s
+#
+# Check that MachineVerifier catches corrupt operands where MO->isReg()
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This needs a requires x86 target


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63973/new/

https://reviews.llvm.org/D63973