[llvm] r364657 - [NFC][InstCombine] Shift amount reassociation: revisit flag preservation tests

[Roman Lebedev via llvm-commits]

Author: lebedevri
Date: Fri Jun 28 09:36:53 2019
New Revision: 364657

URL: http://llvm.org/viewvc/llvm-project?rev=364657&view=rev
Log:
[NFC][InstCombine] Shift amount reassociation: revisit flag preservation tests

Modified:
    llvm/trunk/test/Transforms/InstCombine/shift-amount-reassociation.ll

Modified: llvm/trunk/test/Transforms/InstCombine/shift-amount-reassociation.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift-amount-reassociation.ll?rev=364657&r1=364656&r2=364657&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/shift-amount-reassociation.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/shift-amount-reassociation.ll Fri Jun 28 09:36:53 2019
@@ -108,13 +108,13 @@ define i32 @t6_shl(i32 %x, i32 %y) {
 ; CHECK-NEXT:    [[T0:%.*]] = sub i32 32, [[Y:%.*]]
 ; CHECK-NEXT:    [[T1:%.*]] = shl nuw i32 [[X:%.*]], [[T0]]
 ; CHECK-NEXT:    [[T2:%.*]] = add i32 [[Y]], -2
-; CHECK-NEXT:    [[T3:%.*]] = shl i32 [[T1]], [[T2]]
+; CHECK-NEXT:    [[T3:%.*]] = shl nsw i32 [[T1]], [[T2]]
 ; CHECK-NEXT:    ret i32 [[T3]]
 ;
   %t0 = sub i32 32, %y
   %t1 = shl nuw i32 %x, %t0 ; while there, test that we don't propagate partial 'nuw' flag
   %t2 = add i32 %y, -2
-  %t3 = shl i32 %t1, %t2
+  %t3 = shl nsw i32 %t1, %t2 ; while there, test that we don't propagate partial 'nsw' flag
   ret i32 %t3
 }
 define i32 @t7_ashr(i32 %x, i32 %y) {
@@ -133,8 +133,8 @@ define i32 @t7_ashr(i32 %x, i32 %y) {
 }
 
 ; If the same flag is present on both shifts, it can be kept.
-define i32 @t8_lshr_flag_preservation(i32 %x, i32 %y) {
-; CHECK-LABEL: @t8_lshr_flag_preservation(
+define i32 @t8_lshr_exact_flag_preservation(i32 %x, i32 %y) {
+; CHECK-LABEL: @t8_lshr_exact_flag_preservation(
 ; CHECK-NEXT:    [[T0:%.*]] = sub i32 32, [[Y:%.*]]
 ; CHECK-NEXT:    [[T1:%.*]] = lshr exact i32 [[X:%.*]], [[T0]]
 ; CHECK-NEXT:    [[T2:%.*]] = add i32 [[Y]], -2
@@ -147,8 +147,8 @@ define i32 @t8_lshr_flag_preservation(i3
   %t3 = lshr exact i32 %t1, %t2
   ret i32 %t3
 }
-define i32 @t9_ashr_flag_preservation(i32 %x, i32 %y) {
-; CHECK-LABEL: @t9_ashr_flag_preservation(
+define i32 @t9_ashr_exact_flag_preservation(i32 %x, i32 %y) {
+; CHECK-LABEL: @t9_ashr_exact_flag_preservation(
 ; CHECK-NEXT:    [[T0:%.*]] = sub i32 32, [[Y:%.*]]
 ; CHECK-NEXT:    [[T1:%.*]] = ashr exact i32 [[X:%.*]], [[T0]]
 ; CHECK-NEXT:    [[T2:%.*]] = add i32 [[Y]], -2
@@ -161,8 +161,8 @@ define i32 @t9_ashr_flag_preservation(i3
   %t3 = ashr exact i32 %t1, %t2
   ret i32 %t3
 }
-define i32 @t10_shl_flag_preservation(i32 %x, i32 %y) {
-; CHECK-LABEL: @t10_shl_flag_preservation(
+define i32 @t10_shl_nuw_flag_preservation(i32 %x, i32 %y) {
+; CHECK-LABEL: @t10_shl_nuw_flag_preservation(
 ; CHECK-NEXT:    [[T0:%.*]] = sub i32 32, [[Y:%.*]]
 ; CHECK-NEXT:    [[T1:%.*]] = shl nuw i32 [[X:%.*]], [[T0]]
 ; CHECK-NEXT:    [[T2:%.*]] = add i32 [[Y]], -2
@@ -175,14 +175,28 @@ define i32 @t10_shl_flag_preservation(i3
   %t3 = shl nuw nsw i32 %t1, %t2 ; only 'nuw' should be propagated.
   ret i32 %t3
 }
+define i32 @t11_shl_nsw_flag_preservation(i32 %x, i32 %y) {
+; CHECK-LABEL: @t11_shl_nsw_flag_preservation(
+; CHECK-NEXT:    [[T0:%.*]] = sub i32 32, [[Y:%.*]]
+; CHECK-NEXT:    [[T1:%.*]] = shl nsw i32 [[X:%.*]], [[T0]]
+; CHECK-NEXT:    [[T2:%.*]] = add i32 [[Y]], -2
+; CHECK-NEXT:    [[T3:%.*]] = shl nuw nsw i32 [[T1]], [[T2]]
+; CHECK-NEXT:    ret i32 [[T3]]
+;
+  %t0 = sub i32 32, %y
+  %t1 = shl nsw i32 %x, %t0
+  %t2 = add i32 %y, -2
+  %t3 = shl nsw nuw i32 %t1, %t2 ; only 'nuw' should be propagated.
+  ret i32 %t3
+}
 
 ; No one-use tests since we will only produce a single instruction here.
 
 ; Negative tests
 
 ; Can't fold, total shift would be 32
-define i32 @n11(i32 %x, i32 %y) {
-; CHECK-LABEL: @n11(
+define i32 @n12(i32 %x, i32 %y) {
+; CHECK-LABEL: @n12(
 ; CHECK-NEXT:    [[T0:%.*]] = sub i32 30, [[Y:%.*]]
 ; CHECK-NEXT:    [[T1:%.*]] = lshr i32 [[X:%.*]], [[T0]]
 ; CHECK-NEXT:    [[T2:%.*]] = add i32 [[Y]], 2
@@ -196,8 +210,8 @@ define i32 @n11(i32 %x, i32 %y) {
   ret i32 %t3
 }
 ; Can't fold, for second channel the shift would 32
-define <2 x i32> @t12_vec(<2 x i32> %x, <2 x i32> %y) {
-; CHECK-LABEL: @t12_vec(
+define <2 x i32> @t13_vec(<2 x i32> %x, <2 x i32> %y) {
+; CHECK-LABEL: @t13_vec(
 ; CHECK-NEXT:    [[T0:%.*]] = sub <2 x i32> <i32 32, i32 30>, [[Y:%.*]]
 ; CHECK-NEXT:    [[T1:%.*]] = lshr <2 x i32> [[X:%.*]], [[T0]]
 ; CHECK-NEXT:    [[T2:%.*]] = add <2 x i32> [[Y]], <i32 -2, i32 2>