[PATCH] D63910: [AArch64][GlobalISel] Overhaul legalization & isel or shifts to select immediate forms

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 27 17:34:12 PDT 2019


arsenm added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp:1135-1137
+  constrainSelectedInstRegOperands(*NewI, TII, TRI, RBI);
+  I.eraseFromParent();
+  return true;
----------------
This should return the result of constrainSelectedInstRegOperands


================
Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir:74-75
     ; CHECK-LABEL: name: test_zext_i1_to_i64
-    ; CHECK: [[C:%[0-9]+]]:_(s1) = G_CONSTANT i1 false
-    ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[C]](s1)
-    ; CHECK: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
+    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+    ; CHECK: $vgpr0_vgpr1 = COPY [[C]](s64)
     %0:_(s1) = G_CONSTANT i1 0
----------------
This seems fine. We probably shouldn't be allowing legal s1 constants anyway.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63910/new/

https://reviews.llvm.org/D63910





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