[PATCH] D63472: hwasan: Use llvm.read_register intrinsic to read the PC on aarch64 instead of taking the function's address.

Peter Collingbourne via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 27 16:29:11 PDT 2019


This revision was automatically updated to reflect the committed changes.
Closed by commit rL364608: hwasan: Use llvm.read_register intrinsic to read the PC on aarch64 instead of… (authored by pcc, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D63472?vs=205245&id=206963#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63472/new/

https://reviews.llvm.org/D63472

Files:
  llvm/trunk/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
  llvm/trunk/test/Instrumentation/HWAddressSanitizer/prologue.ll


Index: llvm/trunk/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
===================================================================
--- llvm/trunk/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
+++ llvm/trunk/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
@@ -210,6 +210,7 @@
       SmallVectorImpl<AllocaInst *> &Allocas,
       DenseMap<AllocaInst *, std::vector<DbgDeclareInst *>> &AllocaDeclareMap,
       SmallVectorImpl<Instruction *> &RetVec, Value *StackTag);
+  Value *readRegister(IRBuilder<> &IRB, StringRef Name);
   bool instrumentLandingPads(SmallVectorImpl<Instruction *> &RetVec);
   Value *getNextTagWithCall(IRBuilder<> &IRB);
   Value *getStackBaseTag(IRBuilder<> &IRB);
@@ -935,7 +936,11 @@
     StackBaseTag = IRB.CreateAShr(ThreadLong, 3);
 
     // Prepare ring buffer data.
-    auto PC = IRB.CreatePtrToInt(F, IntptrTy);
+    Value *PC;
+    if (TargetTriple.getArch() == Triple::aarch64)
+      PC = readRegister(IRB, "pc");
+    else
+      PC = IRB.CreatePtrToInt(F, IntptrTy);
     auto GetStackPointerFn =
         Intrinsic::getDeclaration(F->getParent(), Intrinsic::frameaddress);
     Value *SP = IRB.CreatePtrToInt(
@@ -981,19 +986,23 @@
   LocalDynamicShadow = IRB.CreateIntToPtr(LocalDynamicShadow, Int8PtrTy);
 }
 
-bool HWAddressSanitizer::instrumentLandingPads(
-    SmallVectorImpl<Instruction *> &LandingPadVec) {
-  Module *M = LandingPadVec[0]->getModule();
+Value *HWAddressSanitizer::readRegister(IRBuilder<> &IRB, StringRef Name) {
+  Module *M = IRB.GetInsertBlock()->getParent()->getParent();
   Function *ReadRegister =
       Intrinsic::getDeclaration(M, Intrinsic::read_register, IntptrTy);
-  const char *RegName =
-      (TargetTriple.getArch() == Triple::x86_64) ? "rsp" : "sp";
-  MDNode *MD = MDNode::get(*C, {MDString::get(*C, RegName)});
+  MDNode *MD = MDNode::get(*C, {MDString::get(*C, Name)});
   Value *Args[] = {MetadataAsValue::get(*C, MD)};
+  return IRB.CreateCall(ReadRegister, Args);
+}
 
+bool HWAddressSanitizer::instrumentLandingPads(
+    SmallVectorImpl<Instruction *> &LandingPadVec) {
   for (auto *LP : LandingPadVec) {
     IRBuilder<> IRB(LP->getNextNode());
-    IRB.CreateCall(HWAsanHandleVfork, {IRB.CreateCall(ReadRegister, Args)});
+    IRB.CreateCall(
+        HWAsanHandleVfork,
+        {readRegister(IRB, (TargetTriple.getArch() == Triple::x86_64) ? "rsp"
+                                                                      : "sp")});
   }
   return true;
 }
Index: llvm/trunk/test/Instrumentation/HWAddressSanitizer/prologue.ll
===================================================================
--- llvm/trunk/test/Instrumentation/HWAddressSanitizer/prologue.ll
+++ llvm/trunk/test/Instrumentation/HWAddressSanitizer/prologue.ll
@@ -60,6 +60,7 @@
 
 ; CHECK-NOHISTORY-NOT: store i64
 
+; CHECK-HISTORY: call i64 @llvm.read_register.i64(metadata [[MD:![0-9]*]])
 ; CHECK-HISTORY: %[[PTR:[^ ]*]] = inttoptr i64 %[[D]] to i64*
 ; CHECK-HISTORY: store i64 %{{.*}}, i64* %[[PTR]]
 ; CHECK-HISTORY: %[[D1:[^ ]*]] = ashr i64 %[[D]], 56
@@ -82,3 +83,5 @@
   call void @use(i32* %x)
   ret void
 }
+
+; CHECK-HISTORY: [[MD]] = !{!"pc"}


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