[llvm] r364608 - hwasan: Use llvm.read_register intrinsic to read the PC on aarch64 instead of taking the function's address.

[Peter Collingbourne via llvm-commits]

Author: pcc
Date: Thu Jun 27 16:24:07 2019
New Revision: 364608

URL: http://llvm.org/viewvc/llvm-project?rev=364608&view=rev
Log:
hwasan: Use llvm.read_register intrinsic to read the PC on aarch64 instead of taking the function's address.

This shaves an instruction (and a GOT entry in PIC code) off prologues of
functions with stack variables.

Differential Revision: https://reviews.llvm.org/D63472

Modified:
    llvm/trunk/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
    llvm/trunk/test/Instrumentation/HWAddressSanitizer/prologue.ll

Modified: llvm/trunk/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp?rev=364608&r1=364607&r2=364608&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp (original)
+++ llvm/trunk/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp Thu Jun 27 16:24:07 2019
@@ -210,6 +210,7 @@ public:
       SmallVectorImpl<AllocaInst *> &Allocas,
       DenseMap<AllocaInst *, std::vector<DbgDeclareInst *>> &AllocaDeclareMap,
       SmallVectorImpl<Instruction *> &RetVec, Value *StackTag);
+  Value *readRegister(IRBuilder<> &IRB, StringRef Name);
   bool instrumentLandingPads(SmallVectorImpl<Instruction *> &RetVec);
   Value *getNextTagWithCall(IRBuilder<> &IRB);
   Value *getStackBaseTag(IRBuilder<> &IRB);
@@ -935,7 +936,11 @@ void HWAddressSanitizer::emitPrologue(IR
     StackBaseTag = IRB.CreateAShr(ThreadLong, 3);
 
     // Prepare ring buffer data.
-    auto PC = IRB.CreatePtrToInt(F, IntptrTy);
+    Value *PC;
+    if (TargetTriple.getArch() == Triple::aarch64)
+      PC = readRegister(IRB, "pc");
+    else
+      PC = IRB.CreatePtrToInt(F, IntptrTy);
     auto GetStackPointerFn =
         Intrinsic::getDeclaration(F->getParent(), Intrinsic::frameaddress);
     Value *SP = IRB.CreatePtrToInt(
@@ -981,19 +986,23 @@ void HWAddressSanitizer::emitPrologue(IR
   LocalDynamicShadow = IRB.CreateIntToPtr(LocalDynamicShadow, Int8PtrTy);
 }
 
-bool HWAddressSanitizer::instrumentLandingPads(
-    SmallVectorImpl<Instruction *> &LandingPadVec) {
-  Module *M = LandingPadVec[0]->getModule();
+Value *HWAddressSanitizer::readRegister(IRBuilder<> &IRB, StringRef Name) {
+  Module *M = IRB.GetInsertBlock()->getParent()->getParent();
   Function *ReadRegister =
       Intrinsic::getDeclaration(M, Intrinsic::read_register, IntptrTy);
-  const char *RegName =
-      (TargetTriple.getArch() == Triple::x86_64) ? "rsp" : "sp";
-  MDNode *MD = MDNode::get(*C, {MDString::get(*C, RegName)});
+  MDNode *MD = MDNode::get(*C, {MDString::get(*C, Name)});
   Value *Args[] = {MetadataAsValue::get(*C, MD)};
+  return IRB.CreateCall(ReadRegister, Args);
+}
 
+bool HWAddressSanitizer::instrumentLandingPads(
+    SmallVectorImpl<Instruction *> &LandingPadVec) {
   for (auto *LP : LandingPadVec) {
     IRBuilder<> IRB(LP->getNextNode());
-    IRB.CreateCall(HWAsanHandleVfork, {IRB.CreateCall(ReadRegister, Args)});
+    IRB.CreateCall(
+        HWAsanHandleVfork,
+        {readRegister(IRB, (TargetTriple.getArch() == Triple::x86_64) ? "rsp"
+                                                                      : "sp")});
   }
   return true;
 }

Modified: llvm/trunk/test/Instrumentation/HWAddressSanitizer/prologue.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Instrumentation/HWAddressSanitizer/prologue.ll?rev=364608&r1=364607&r2=364608&view=diff
==============================================================================
--- llvm/trunk/test/Instrumentation/HWAddressSanitizer/prologue.ll (original)
+++ llvm/trunk/test/Instrumentation/HWAddressSanitizer/prologue.ll Thu Jun 27 16:24:07 2019
@@ -60,6 +60,7 @@ define void @test_alloca() sanitize_hwad
 
 ; CHECK-NOHISTORY-NOT: store i64
 
+; CHECK-HISTORY: call i64 @llvm.read_register.i64(metadata [[MD:![0-9]*]])
 ; CHECK-HISTORY: %[[PTR:[^ ]*]] = inttoptr i64 %[[D]] to i64*
 ; CHECK-HISTORY: store i64 %{{.*}}, i64* %[[PTR]]
 ; CHECK-HISTORY: %[[D1:[^ ]*]] = ashr i64 %[[D]], 56
@@ -82,3 +83,5 @@ entry:
   call void @use(i32* %x)
   ret void
 }
+
+; CHECK-HISTORY: [[MD]] = !{!"pc"}