[llvm] r364570 - [WebAssembly] Fix p2align in assembler.
Wouter van Oortmerssen via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 27 11:11:15 PDT 2019
Author: aardappel
Date: Thu Jun 27 11:11:15 2019
New Revision: 364570
URL: http://llvm.org/viewvc/llvm-project?rev=364570&view=rev
Log:
[WebAssembly] Fix p2align in assembler.
Summary:
- Match the syntax output by InstPrinter.
- Fix it always emitting 0 for align. Had to work around fact that
opcode is not available for GetDefaultP2Align while parsing.
- Updated tests that were erroneously happy with a p2align=0
Fixes https://bugs.llvm.org/show_bug.cgi?id=40752
Reviewers: aheejin, sbc100
Subscribers: jgravelle-google, sunfish, jfb, llvm-commits, dschuff
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63633
Modified:
llvm/trunk/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
llvm/trunk/test/MC/WebAssembly/atomics-encodings.s
llvm/trunk/test/MC/WebAssembly/basic-assembly.s
llvm/trunk/test/MC/WebAssembly/reloc-pic.s
llvm/trunk/test/MC/WebAssembly/simd-encodings.s
Modified: llvm/trunk/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp?rev=364570&r1=364569&r2=364570&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp Thu Jun 27 11:11:15 2019
@@ -349,21 +349,28 @@ public:
parseSingleInteger(IsNegative, Operands);
// FIXME: there is probably a cleaner way to do this.
auto IsLoadStore = InstName.startswith("load") ||
- InstName.startswith("store") ||
- InstName.startswith("atomic");
- if (IsLoadStore) {
- // Parse load/store operands of the form: offset align
- auto &Offset = Lexer.getTok();
- if (Offset.is(AsmToken::Integer)) {
+ InstName.startswith("store");
+ auto IsAtomic = InstName.startswith("atomic");
+ if (IsLoadStore || IsAtomic) {
+ // Parse load/store operands of the form: offset:p2align=align
+ if (IsLoadStore && isNext(AsmToken::Colon)) {
+ auto Id = expectIdent();
+ if (Id != "p2align")
+ return error("Expected p2align, instead got: " + Id);
+ if (expect(AsmToken::Equal, "="))
+ return true;
+ if (!Lexer.is(AsmToken::Integer))
+ return error("Expected integer constant");
parseSingleInteger(false, Operands);
} else {
- // Alignment not specified.
- // FIXME: correctly derive a default from the instruction.
+ // Alignment not specified (or atomics, must use default alignment).
// We can't just call WebAssembly::GetDefaultP2Align since we don't have
- // an opcode until after the assembly matcher.
+ // an opcode until after the assembly matcher, so set a default to fix
+ // up later.
+ auto Tok = Lexer.getTok();
Operands.push_back(make_unique<WebAssemblyOperand>(
- WebAssemblyOperand::Integer, Offset.getLoc(), Offset.getEndLoc(),
- WebAssemblyOperand::IntOp{0}));
+ WebAssemblyOperand::Integer, Tok.getLoc(), Tok.getEndLoc(),
+ WebAssemblyOperand::IntOp{-1}));
}
}
return false;
@@ -699,6 +706,13 @@ public:
*Out.getTargetStreamer());
TOut.emitLocal(SmallVector<wasm::ValType, 0>());
}
+ // Fix unknown p2align operands.
+ auto Align = WebAssembly::GetDefaultP2AlignAny(Inst.getOpcode());
+ if (Align != -1U) {
+ auto &Op0 = Inst.getOperand(0);
+ if (Op0.getImm() == -1)
+ Op0.setImm(Align);
+ }
Out.EmitInstruction(Inst, getSTI());
if (CurrentState == EndFunction) {
onEndOfFunction();
Modified: llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h?rev=364570&r1=364569&r2=364570&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h (original)
+++ llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h Thu Jun 27 11:11:15 2019
@@ -123,7 +123,7 @@ namespace llvm {
namespace WebAssembly {
/// Return the default p2align value for a load or store with the given opcode.
-inline unsigned GetDefaultP2Align(unsigned Opcode) {
+inline unsigned GetDefaultP2AlignAny(unsigned Opcode) {
switch (Opcode) {
case WebAssembly::LOAD8_S_I32:
case WebAssembly::LOAD8_S_I32_S:
@@ -333,8 +333,16 @@ inline unsigned GetDefaultP2Align(unsign
case WebAssembly::STORE_v2f64_S:
return 4;
default:
+ return -1;
+ }
+}
+
+inline unsigned GetDefaultP2Align(unsigned Opcode) {
+ auto Align = GetDefaultP2AlignAny(Opcode);
+ if (Align == -1U) {
llvm_unreachable("Only loads and stores have p2align values");
}
+ return Align;
}
/// This is used to indicate block signatures.
Modified: llvm/trunk/test/MC/WebAssembly/atomics-encodings.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/WebAssembly/atomics-encodings.s?rev=364570&r1=364569&r2=364570&view=diff
==============================================================================
--- llvm/trunk/test/MC/WebAssembly/atomics-encodings.s (original)
+++ llvm/trunk/test/MC/WebAssembly/atomics-encodings.s Thu Jun 27 11:11:15 2019
@@ -4,146 +4,146 @@ main:
.functype main () -> ()
# FIXME This doesn't work because of PR40728. Enable this once it's fixed.
- # C HECK: atomic.notify 0:p2align=0 # encoding: [0xfe,0x00,0x00,0x00]
+ # C HECK: atomic.notify 0 # encoding: [0xfe,0x00,0x00,0x00]
# atomic.notify 0
- # CHECK: i32.atomic.wait 0:p2align=0 # encoding: [0xfe,0x01,0x00,0x00]
+ # CHECK: i32.atomic.wait 0 # encoding: [0xfe,0x01,0x02,0x00]
i32.atomic.wait 0
- # CHECK: i64.atomic.wait 0:p2align=0 # encoding: [0xfe,0x02,0x00,0x00]
+ # CHECK: i64.atomic.wait 0 # encoding: [0xfe,0x02,0x03,0x00]
i64.atomic.wait 0
- # CHECK: i32.atomic.load 0:p2align=0 # encoding: [0xfe,0x10,0x00,0x00]
+ # CHECK: i32.atomic.load 0 # encoding: [0xfe,0x10,0x02,0x00]
i32.atomic.load 0
- # CHECK: i64.atomic.load 4:p2align=0 # encoding: [0xfe,0x11,0x00,0x04]
+ # CHECK: i64.atomic.load 4 # encoding: [0xfe,0x11,0x03,0x04]
i64.atomic.load 4
# CHECK: i32.atomic.load8_u 48 # encoding: [0xfe,0x12,0x00,0x30]
i32.atomic.load8_u 48
- # CHECK: i32.atomic.load16_u 0:p2align=0 # encoding: [0xfe,0x13,0x00,0x00]
+ # CHECK: i32.atomic.load16_u 0 # encoding: [0xfe,0x13,0x01,0x00]
i32.atomic.load16_u 0
# CHECK: i64.atomic.load8_u 0 # encoding: [0xfe,0x14,0x00,0x00]
i64.atomic.load8_u 0
- # CHECK: i64.atomic.load16_u 0:p2align=0 # encoding: [0xfe,0x15,0x00,0x00]
+ # CHECK: i64.atomic.load16_u 0 # encoding: [0xfe,0x15,0x01,0x00]
i64.atomic.load16_u 0
- # CHECK: i64.atomic.load32_u 0:p2align=0 # encoding: [0xfe,0x16,0x00,0x00]
+ # CHECK: i64.atomic.load32_u 0 # encoding: [0xfe,0x16,0x02,0x00]
i64.atomic.load32_u 0
- # CHECK: i32.atomic.store 0:p2align=0 # encoding: [0xfe,0x17,0x00,0x00]
+ # CHECK: i32.atomic.store 0 # encoding: [0xfe,0x17,0x02,0x00]
i32.atomic.store 0
- # CHECK: i64.atomic.store 8:p2align=0 # encoding: [0xfe,0x18,0x00,0x08]
+ # CHECK: i64.atomic.store 8 # encoding: [0xfe,0x18,0x03,0x08]
i64.atomic.store 8
# CHECK: i32.atomic.store8 0 # encoding: [0xfe,0x19,0x00,0x00]
i32.atomic.store8 0
- # CHECK: i32.atomic.store16 0:p2align=0 # encoding: [0xfe,0x1a,0x00,0x00]
+ # CHECK: i32.atomic.store16 0 # encoding: [0xfe,0x1a,0x01,0x00]
i32.atomic.store16 0
# CHECK: i64.atomic.store8 16 # encoding: [0xfe,0x1b,0x00,0x10]
i64.atomic.store8 16
- # CHECK: i64.atomic.store16 0:p2align=0 # encoding: [0xfe,0x1c,0x00,0x00]
+ # CHECK: i64.atomic.store16 0 # encoding: [0xfe,0x1c,0x01,0x00]
i64.atomic.store16 0
- # CHECK: i64.atomic.store32 0:p2align=0 # encoding: [0xfe,0x1d,0x00,0x00]
+ # CHECK: i64.atomic.store32 0 # encoding: [0xfe,0x1d,0x02,0x00]
i64.atomic.store32 0
- # CHECK: i32.atomic.rmw.add 0:p2align=0 # encoding: [0xfe,0x1e,0x00,0x00]
+ # CHECK: i32.atomic.rmw.add 0 # encoding: [0xfe,0x1e,0x02,0x00]
i32.atomic.rmw.add 0
- # CHECK: i64.atomic.rmw.add 0:p2align=0 # encoding: [0xfe,0x1f,0x00,0x00]
+ # CHECK: i64.atomic.rmw.add 0 # encoding: [0xfe,0x1f,0x03,0x00]
i64.atomic.rmw.add 0
# CHECK: i32.atomic.rmw8.add_u 0 # encoding: [0xfe,0x20,0x00,0x00]
i32.atomic.rmw8.add_u 0
- # CHECK: i32.atomic.rmw16.add_u 0:p2align=0 # encoding: [0xfe,0x21,0x00,0x00]
+ # CHECK: i32.atomic.rmw16.add_u 0 # encoding: [0xfe,0x21,0x01,0x00]
i32.atomic.rmw16.add_u 0
# CHECK: i64.atomic.rmw8.add_u 0 # encoding: [0xfe,0x22,0x00,0x00]
i64.atomic.rmw8.add_u 0
- # CHECK: i64.atomic.rmw16.add_u 0:p2align=0 # encoding: [0xfe,0x23,0x00,0x00]
+ # CHECK: i64.atomic.rmw16.add_u 0 # encoding: [0xfe,0x23,0x01,0x00]
i64.atomic.rmw16.add_u 0
- # CHECK: i64.atomic.rmw32.add_u 16:p2align=0 # encoding: [0xfe,0x24,0x00,0x10]
+ # CHECK: i64.atomic.rmw32.add_u 16 # encoding: [0xfe,0x24,0x02,0x10]
i64.atomic.rmw32.add_u 16
- # CHECK: i32.atomic.rmw.sub 0:p2align=0 # encoding: [0xfe,0x25,0x00,0x00]
+ # CHECK: i32.atomic.rmw.sub 0 # encoding: [0xfe,0x25,0x02,0x00]
i32.atomic.rmw.sub 0
- # CHECK: i64.atomic.rmw.sub 0:p2align=0 # encoding: [0xfe,0x26,0x00,0x00]
+ # CHECK: i64.atomic.rmw.sub 0 # encoding: [0xfe,0x26,0x03,0x00]
i64.atomic.rmw.sub 0
# CHECK: i32.atomic.rmw8.sub_u 0 # encoding: [0xfe,0x27,0x00,0x00]
i32.atomic.rmw8.sub_u 0
- # CHECK: i32.atomic.rmw16.sub_u 0:p2align=0 # encoding: [0xfe,0x28,0x00,0x00]
+ # CHECK: i32.atomic.rmw16.sub_u 0 # encoding: [0xfe,0x28,0x01,0x00]
i32.atomic.rmw16.sub_u 0
# CHECK: i64.atomic.rmw8.sub_u 8 # encoding: [0xfe,0x29,0x00,0x08]
i64.atomic.rmw8.sub_u 8
- # CHECK: i64.atomic.rmw16.sub_u 0:p2align=0 # encoding: [0xfe,0x2a,0x00,0x00]
+ # CHECK: i64.atomic.rmw16.sub_u 0 # encoding: [0xfe,0x2a,0x01,0x00]
i64.atomic.rmw16.sub_u 0
- # CHECK: i64.atomic.rmw32.sub_u 0:p2align=0 # encoding: [0xfe,0x2b,0x00,0x00]
+ # CHECK: i64.atomic.rmw32.sub_u 0 # encoding: [0xfe,0x2b,0x02,0x00]
i64.atomic.rmw32.sub_u 0
- # CHECK: i32.atomic.rmw.and 0:p2align=0 # encoding: [0xfe,0x2c,0x00,0x00]
+ # CHECK: i32.atomic.rmw.and 0 # encoding: [0xfe,0x2c,0x02,0x00]
i32.atomic.rmw.and 0
- # CHECK: i64.atomic.rmw.and 0:p2align=0 # encoding: [0xfe,0x2d,0x00,0x00]
+ # CHECK: i64.atomic.rmw.and 0 # encoding: [0xfe,0x2d,0x03,0x00]
i64.atomic.rmw.and 0
# CHECK: i32.atomic.rmw8.and_u 0 # encoding: [0xfe,0x2e,0x00,0x00]
i32.atomic.rmw8.and_u 0
- # CHECK: i32.atomic.rmw16.and_u 0:p2align=0 # encoding: [0xfe,0x2f,0x00,0x00]
+ # CHECK: i32.atomic.rmw16.and_u 0 # encoding: [0xfe,0x2f,0x01,0x00]
i32.atomic.rmw16.and_u 0
# CHECK: i64.atomic.rmw8.and_u 96 # encoding: [0xfe,0x30,0x00,0x60]
i64.atomic.rmw8.and_u 96
- # CHECK: i64.atomic.rmw16.and_u 0:p2align=0 # encoding: [0xfe,0x31,0x00,0x00]
+ # CHECK: i64.atomic.rmw16.and_u 0 # encoding: [0xfe,0x31,0x01,0x00]
i64.atomic.rmw16.and_u 0
- # CHECK: i64.atomic.rmw32.and_u 0:p2align=0 # encoding: [0xfe,0x32,0x00,0x00]
+ # CHECK: i64.atomic.rmw32.and_u 0 # encoding: [0xfe,0x32,0x02,0x00]
i64.atomic.rmw32.and_u 0
- # CHECK: i32.atomic.rmw.or 0:p2align=0 # encoding: [0xfe,0x33,0x00,0x00]
+ # CHECK: i32.atomic.rmw.or 0 # encoding: [0xfe,0x33,0x02,0x00]
i32.atomic.rmw.or 0
- # CHECK: i64.atomic.rmw.or 0:p2align=0 # encoding: [0xfe,0x34,0x00,0x00]
+ # CHECK: i64.atomic.rmw.or 0 # encoding: [0xfe,0x34,0x03,0x00]
i64.atomic.rmw.or 0
# CHECK: i32.atomic.rmw8.or_u 0 # encoding: [0xfe,0x35,0x00,0x00]
i32.atomic.rmw8.or_u 0
- # CHECK: i32.atomic.rmw16.or_u 0:p2align=0 # encoding: [0xfe,0x36,0x00,0x00]
+ # CHECK: i32.atomic.rmw16.or_u 0 # encoding: [0xfe,0x36,0x01,0x00]
i32.atomic.rmw16.or_u 0
# CHECK: i64.atomic.rmw8.or_u 0 # encoding: [0xfe,0x37,0x00,0x00]
i64.atomic.rmw8.or_u 0
- # CHECK: i64.atomic.rmw16.or_u 48:p2align=0 # encoding: [0xfe,0x38,0x00,0x30]
+ # CHECK: i64.atomic.rmw16.or_u 48 # encoding: [0xfe,0x38,0x01,0x30]
i64.atomic.rmw16.or_u 48
- # CHECK: i64.atomic.rmw32.or_u 0:p2align=0 # encoding: [0xfe,0x39,0x00,0x00]
+ # CHECK: i64.atomic.rmw32.or_u 0 # encoding: [0xfe,0x39,0x02,0x00]
i64.atomic.rmw32.or_u 0
- # CHECK: i32.atomic.rmw.xor 0:p2align=0 # encoding: [0xfe,0x3a,0x00,0x00]
+ # CHECK: i32.atomic.rmw.xor 0 # encoding: [0xfe,0x3a,0x02,0x00]
i32.atomic.rmw.xor 0
- # CHECK: i64.atomic.rmw.xor 0:p2align=0 # encoding: [0xfe,0x3b,0x00,0x00]
+ # CHECK: i64.atomic.rmw.xor 0 # encoding: [0xfe,0x3b,0x03,0x00]
i64.atomic.rmw.xor 0
# CHECK: i32.atomic.rmw8.xor_u 4 # encoding: [0xfe,0x3c,0x00,0x04]
i32.atomic.rmw8.xor_u 4
- # CHECK: i32.atomic.rmw16.xor_u 0:p2align=0 # encoding: [0xfe,0x3d,0x00,0x00]
+ # CHECK: i32.atomic.rmw16.xor_u 0 # encoding: [0xfe,0x3d,0x01,0x00]
i32.atomic.rmw16.xor_u 0
# CHECK: i64.atomic.rmw8.xor_u 0 # encoding: [0xfe,0x3e,0x00,0x00]
i64.atomic.rmw8.xor_u 0
- # CHECK: i64.atomic.rmw16.xor_u 0:p2align=0 # encoding: [0xfe,0x3f,0x00,0x00]
+ # CHECK: i64.atomic.rmw16.xor_u 0 # encoding: [0xfe,0x3f,0x01,0x00]
i64.atomic.rmw16.xor_u 0
- # CHECK: i64.atomic.rmw32.xor_u 0:p2align=0 # encoding: [0xfe,0x40,0x00,0x00]
+ # CHECK: i64.atomic.rmw32.xor_u 0 # encoding: [0xfe,0x40,0x02,0x00]
i64.atomic.rmw32.xor_u 0
- # CHECK: i32.atomic.rmw.xchg 0:p2align=0 # encoding: [0xfe,0x41,0x00,0x00]
+ # CHECK: i32.atomic.rmw.xchg 0 # encoding: [0xfe,0x41,0x02,0x00]
i32.atomic.rmw.xchg 0
- # CHECK: i64.atomic.rmw.xchg 0:p2align=0 # encoding: [0xfe,0x42,0x00,0x00]
+ # CHECK: i64.atomic.rmw.xchg 0 # encoding: [0xfe,0x42,0x03,0x00]
i64.atomic.rmw.xchg 0
# CHECK: i32.atomic.rmw8.xchg_u 0 # encoding: [0xfe,0x43,0x00,0x00]
i32.atomic.rmw8.xchg_u 0
- # CHECK: i32.atomic.rmw16.xchg_u 0:p2align=0 # encoding: [0xfe,0x44,0x00,0x00]
+ # CHECK: i32.atomic.rmw16.xchg_u 0 # encoding: [0xfe,0x44,0x01,0x00]
i32.atomic.rmw16.xchg_u 0
# CHECK: i64.atomic.rmw8.xchg_u 0 # encoding: [0xfe,0x45,0x00,0x00]
i64.atomic.rmw8.xchg_u 0
- # CHECK: i64.atomic.rmw16.xchg_u 8:p2align=0 # encoding: [0xfe,0x46,0x00,0x08]
+ # CHECK: i64.atomic.rmw16.xchg_u 8 # encoding: [0xfe,0x46,0x01,0x08]
i64.atomic.rmw16.xchg_u 8
- # CHECK: i64.atomic.rmw32.xchg_u 0:p2align=0 # encoding: [0xfe,0x47,0x00,0x00]
+ # CHECK: i64.atomic.rmw32.xchg_u 0 # encoding: [0xfe,0x47,0x02,0x00]
i64.atomic.rmw32.xchg_u 0
- # CHECK: i32.atomic.rmw.cmpxchg 32:p2align=0 # encoding: [0xfe,0x48,0x00,0x20]
+ # CHECK: i32.atomic.rmw.cmpxchg 32 # encoding: [0xfe,0x48,0x02,0x20]
i32.atomic.rmw.cmpxchg 32
- # CHECK: i64.atomic.rmw.cmpxchg 0:p2align=0 # encoding: [0xfe,0x49,0x00,0x00]
+ # CHECK: i64.atomic.rmw.cmpxchg 0 # encoding: [0xfe,0x49,0x03,0x00]
i64.atomic.rmw.cmpxchg 0
# CHECK: i32.atomic.rmw8.cmpxchg_u 0 # encoding: [0xfe,0x4a,0x00,0x00]
i32.atomic.rmw8.cmpxchg_u 0
- # CHECK: i32.atomic.rmw16.cmpxchg_u 0:p2align=0 # encoding: [0xfe,0x4b,0x00,0x00]
+ # CHECK: i32.atomic.rmw16.cmpxchg_u 0 # encoding: [0xfe,0x4b,0x01,0x00]
i32.atomic.rmw16.cmpxchg_u 0
# CHECK: i64.atomic.rmw8.cmpxchg_u 16 # encoding: [0xfe,0x4c,0x00,0x10]
i64.atomic.rmw8.cmpxchg_u 16
- # CHECK: i64.atomic.rmw16.cmpxchg_u 0:p2align=0 # encoding: [0xfe,0x4d,0x00,0x00]
+ # CHECK: i64.atomic.rmw16.cmpxchg_u 0 # encoding: [0xfe,0x4d,0x01,0x00]
i64.atomic.rmw16.cmpxchg_u 0
- # CHECK: i64.atomic.rmw32.cmpxchg_u 0:p2align=0 # encoding: [0xfe,0x4e,0x00,0x00]
+ # CHECK: i64.atomic.rmw32.cmpxchg_u 0 # encoding: [0xfe,0x4e,0x02,0x00]
i64.atomic.rmw32.cmpxchg_u 0
end_function
Modified: llvm/trunk/test/MC/WebAssembly/basic-assembly.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/WebAssembly/basic-assembly.s?rev=364570&r1=364569&r2=364570&view=diff
==============================================================================
--- llvm/trunk/test/MC/WebAssembly/basic-assembly.s (original)
+++ llvm/trunk/test/MC/WebAssembly/basic-assembly.s Thu Jun 27 11:11:15 2019
@@ -17,7 +17,8 @@ test0:
v128.const 0, 1, 2, 3, 4, 5, 6, 7
# Indirect addressing:
local.get 0
- f64.store 0
+ f64.store 1234:p2align=4
+ f64.store 1234 # Natural alignment (3)
# Loops, conditionals, binary ops, calls etc:
block i32
i32.const 1
@@ -104,7 +105,8 @@ test0:
# CHECK-NEXT: v128.const 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
# CHECK-NEXT: v128.const 0, 1, 2, 3, 4, 5, 6, 7
# CHECK-NEXT: local.get 0
-# CHECK-NEXT: f64.store 0:p2align=0
+# CHECK-NEXT: f64.store 1234:p2align=4
+# CHECK-NEXT: f64.store 1234
# CHECK-NEXT: block i32
# CHECK-NEXT: i32.const 1
# CHECK-NEXT: local.get 0
Modified: llvm/trunk/test/MC/WebAssembly/reloc-pic.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/WebAssembly/reloc-pic.s?rev=364570&r1=364569&r2=364570&view=diff
==============================================================================
--- llvm/trunk/test/MC/WebAssembly/reloc-pic.s (original)
+++ llvm/trunk/test/MC/WebAssembly/reloc-pic.s Thu Jun 27 11:11:15 2019
@@ -109,10 +109,10 @@ hidden_func:
# CHECK-NEXT: Functions:
# CHECK-NEXT: - Index: 1
# CHECK-NEXT: Locals: []
-# CHECK-NEXT: Body: 2380808080002800000B
+# CHECK-NEXT: Body: 2380808080002802000B
# CHECK-NEXT: - Index: 2
# CHECK-NEXT: Locals: []
-# CHECK-NEXT: Body: 2381808080002800000B
+# CHECK-NEXT: Body: 2381808080002802000B
# CHECK-NEXT: - Index: 3
# CHECK-NEXT: Locals: []
# CHECK-NEXT: Body: 2380808080004180808080006A0B
Modified: llvm/trunk/test/MC/WebAssembly/simd-encodings.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/WebAssembly/simd-encodings.s?rev=364570&r1=364569&r2=364570&view=diff
==============================================================================
--- llvm/trunk/test/MC/WebAssembly/simd-encodings.s (original)
+++ llvm/trunk/test/MC/WebAssembly/simd-encodings.s Thu Jun 27 11:11:15 2019
@@ -3,10 +3,10 @@
main:
.functype main () -> ()
- # CHECK: v128.load 48:p2align=0 # encoding: [0xfd,0x00,0x00,0x30]
+ # CHECK: v128.load 48 # encoding: [0xfd,0x00,0x04,0x30]
v128.load 48
- # CHECK: v128.store 48:p2align=0 # encoding: [0xfd,0x01,0x00,0x30]
+ # CHECK: v128.store 48 # encoding: [0xfd,0x01,0x04,0x30]
v128.store 48
# CHECK: v128.const 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
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