[PATCH] D63865: [ARM] Fix bogus assertions in copyPhysReg v8.1-M cases.

[Phabricator via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL364534: [ARM] Fix bogus assertions in copyPhysReg v8.1-M cases. (authored by statham, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D63865?vs=206807&id=206839#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63865/new/

https://reviews.llvm.org/D63865

Files:
  llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp


Index: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
===================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -927,25 +927,25 @@
     copyToCPSR(MBB, I, SrcReg, KillSrc, Subtarget);
     return;
   } else if (DestReg == ARM::VPR) {
-    assert(ARM::GPRPairRegClass.contains(SrcReg));
+    assert(ARM::GPRRegClass.contains(SrcReg));
     BuildMI(MBB, I, I->getDebugLoc(), get(ARM::VMSR_P0), DestReg)
         .addReg(SrcReg, getKillRegState(KillSrc))
         .add(predOps(ARMCC::AL));
     return;
   } else if (SrcReg == ARM::VPR) {
-    assert(ARM::GPRPairRegClass.contains(DestReg));
+    assert(ARM::GPRRegClass.contains(DestReg));
     BuildMI(MBB, I, I->getDebugLoc(), get(ARM::VMRS_P0), DestReg)
         .addReg(SrcReg, getKillRegState(KillSrc))
         .add(predOps(ARMCC::AL));
     return;
   } else if (DestReg == ARM::FPSCR_NZCV) {
-    assert(ARM::GPRPairRegClass.contains(SrcReg));
+    assert(ARM::GPRRegClass.contains(SrcReg));
     BuildMI(MBB, I, I->getDebugLoc(), get(ARM::VMSR_FPSCR_NZCVQC), DestReg)
         .addReg(SrcReg, getKillRegState(KillSrc))
         .add(predOps(ARMCC::AL));
     return;
   } else if (SrcReg == ARM::FPSCR_NZCV) {
-    assert(ARM::GPRPairRegClass.contains(DestReg));
+    assert(ARM::GPRRegClass.contains(DestReg));
     BuildMI(MBB, I, I->getDebugLoc(), get(ARM::VMRS_FPSCR_NZCVQC), DestReg)
         .addReg(SrcReg, getKillRegState(KillSrc))
         .add(predOps(ARMCC::AL));


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