[llvm] r364499 - [X86] Remove (vzext_movl (scalar_to_vector (load))) matching code from selectScalarSSELoad.

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 26 22:52:00 PDT 2019


Author: ctopper
Date: Wed Jun 26 22:52:00 2019
New Revision: 364499

URL: http://llvm.org/viewvc/llvm-project?rev=364499&view=rev
Log:
[X86] Remove (vzext_movl (scalar_to_vector (load))) matching code from selectScalarSSELoad.

I think this will be turning into vzext_load during DAG combine.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=364499&r1=364498&r2=364499&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Wed Jun 26 22:52:00 2019
@@ -2321,23 +2321,6 @@ bool X86DAGToDAGISel::selectScalarSSELoa
     }
   }
 
-  // Also handle the case where we explicitly require zeros in the top
-  // elements.  This is a vector shuffle from the zero vector.
-  if (N.getOpcode() == X86ISD::VZEXT_MOVL && N.getNode()->hasOneUse() &&
-      // Check to see if the top elements are all zeros (or bitcast of zeros).
-      N.getOperand(0).getOpcode() == ISD::SCALAR_TO_VECTOR &&
-      N.getOperand(0).getNode()->hasOneUse()) {
-    PatternNodeWithChain = N.getOperand(0).getOperand(0);
-    if (ISD::isNON_EXTLoad(PatternNodeWithChain.getNode()) &&
-        IsProfitableToFold(PatternNodeWithChain, N.getNode(), Root) &&
-        IsLegalToFold(PatternNodeWithChain, N.getNode(), Root, OptLevel)) {
-      // Okay, this is a zero extending load.  Fold it.
-      LoadSDNode *LD = cast<LoadSDNode>(PatternNodeWithChain);
-      return selectAddr(LD, LD->getBasePtr(), Base, Scale, Index, Disp,
-                        Segment);
-    }
-  }
-
   return false;
 }
 




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