[PATCH] D63812: [InstCombine] Shift amount reassociation (PR42391)

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri created this revision.
lebedev.ri added reviewers: spatel, nikic, RKSimon.
lebedev.ri added a project: LLVM.
lebedev.ri added a parent revision: D63811: [IR][Patternmatch] Add m_SpecificInt_ULT() predicate.

Given pattern:
`(x shiftopcode Q) shiftopcode K`
we should rewrite it as
`x shiftopcode (Q+K)`  iff `(Q+K) u< bitwidth(x)`
This is valid for any shift, but they must be identical.

Should fix PR42391 <https://bugs.llvm.org/show_bug.cgi?id=42391>.


Repository:
  rL LLVM

https://reviews.llvm.org/D63812

Files:
  lib/Transforms/InstCombine/InstCombineShifts.cpp
  test/Transforms/InstCombine/shift-amount-reassociation.ll

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