[PATCH] D63799: AMDGPU/GlobalISel: Fix scc->vcc copy handling

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: tstellar, nhaehnle.
Herald added subscribers: Petar.Avramovic, t-tye, tpr, dstuttard, kristof.beyls, rovka, yaxunl, wdng, jvesely, kzhuravl.

This was checking the size of the register with the value of the size,
which happens to be exec. Also fix assuming VCC is 64-bit to fix
wave32.

      

Also remove some untested handling for physical registers which is
skipped. This doesn't insert the V_CNDMASK_B32 if SCC is the physical
copy source. I'm not sure if this should be trying to handle this
special case instead of dealing with this in copyPhysReg.


https://reviews.llvm.org/D63799

Files:
  lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
  lib/Target/AMDGPU/SIRegisterInfo.cpp
  test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir

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