[PATCH] D63677: [ARM] Don't reserve R12 on Thumb1 as an emergency spill slot.

[Eli Friedman via Phabricator via llvm-commits]

efriedma updated this revision to Diff 206562.
efriedma added a comment.

Fix Thumb1FrameLowering::emitPrologue and Thumb1FrameLowering::emitEpilogue so they don't scavenge a register inside of frame setup/teardown.  Instead, just pick a register we know is available.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63677/new/

https://reviews.llvm.org/D63677

Files:
  lib/Target/ARM/ARMBaseRegisterInfo.cpp
  lib/Target/ARM/ARMFrameLowering.cpp
  lib/Target/ARM/ARMISelDAGToDAG.cpp
  lib/Target/ARM/ARMISelLowering.cpp
  lib/Target/ARM/Thumb1FrameLowering.cpp
  lib/Target/ARM/ThumbRegisterInfo.cpp
  lib/Target/ARM/ThumbRegisterInfo.h
  test/CodeGen/ARM/ldrex-frame-size.ll
  test/CodeGen/ARM/scavenging.mir
  test/CodeGen/ARM/thumb1-varalloc.ll
  test/CodeGen/Thumb/emergency-spill-slot.ll
  test/CodeGen/Thumb/frame-access.ll
  test/CodeGen/Thumb/large-stack.ll

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