[PATCH] D63709: [AMDGPU] Add peephole to optimize MOV
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 25 08:51:46 PDT 2019
arsenm added a comment.
In D63709#1557646 <https://reviews.llvm.org/D63709#1557646>, @arsenm wrote:
> In D63709#1557626 <https://reviews.llvm.org/D63709#1557626>, @arsenm wrote:
>
> > In D63709#1557605 <https://reviews.llvm.org/D63709#1557605>, @arsenm wrote:
> >
> > > In D63709#1557592 <https://reviews.llvm.org/D63709#1557592>, @arsenm wrote:
> > >
> > > > Reduced further: https://paste.debian.net/1089194
> > >
> > >
> > > Other targets seem to not have this problem with a slightly generalized version, so I would look into how this is cleaned up there
> >
> >
> > It seems we're missing a simplifycfg run somewhere, so maybe we're thinking of this on the wrong level entirely.. If I run simplify cfg on any of the testcase variants, this problem disappears
>
>
> Other targets seem to run SimiplifyCFG after AtomicExpand, which we are missing. Even with that disabled and the phi survives to machineinstrs, aarch64 and hexagon both avoid this
MachineCSE should be taking care of this, but it for some reason concludes it isn't profitable:
Examining: %9:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec
- Found a common subexpression: %7:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec
- Not profitable, avoid CSE!
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rL LLVM
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https://reviews.llvm.org/D63709/new/
https://reviews.llvm.org/D63709
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