[llvm] r364314 - [AArch64][x86] add tests for ctpop != 1; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 25 06:37:16 PDT 2019
Author: spatel
Date: Tue Jun 25 06:37:16 2019
New Revision: 364314
URL: http://llvm.org/viewvc/llvm-project?rev=364314&view=rev
Log:
[AArch64][x86] add tests for ctpop != 1; NFC
This is the inverted predicate pattern for D63004.
Modified:
llvm/trunk/test/CodeGen/AArch64/arm64-popcnt.ll
llvm/trunk/test/CodeGen/X86/ctpop-combine.ll
Modified: llvm/trunk/test/CodeGen/AArch64/arm64-popcnt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-popcnt.ll?rev=364314&r1=364313&r2=364314&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-popcnt.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-popcnt.ll Tue Jun 25 06:37:16 2019
@@ -199,6 +199,40 @@ define i32 @ctpop_eq_one(i64 %x) nounwin
ret i32 %conv
}
+define i32 @ctpop_ne_one(i64 %x) nounwind readnone {
+; CHECK-LABEL: ctpop_ne_one:
+; CHECK: // %bb.0:
+; CHECK-NEXT: fmov d0, x0
+; CHECK-NEXT: cnt.8b v0, v0
+; CHECK-NEXT: uaddlv.8b h0, v0
+; CHECK-NEXT: fmov w8, s0
+; CHECK-NEXT: cmp x8, #1 // =1
+; CHECK-NEXT: cset w0, ne
+; CHECK-NEXT: ret
+;
+; CHECK-NONEON-LABEL: ctpop_ne_one:
+; CHECK-NONEON: // %bb.0:
+; CHECK-NONEON-NEXT: lsr x8, x0, #1
+; CHECK-NONEON-NEXT: and x8, x8, #0x5555555555555555
+; CHECK-NONEON-NEXT: sub x8, x0, x8
+; CHECK-NONEON-NEXT: and x9, x8, #0x3333333333333333
+; CHECK-NONEON-NEXT: lsr x8, x8, #2
+; CHECK-NONEON-NEXT: and x8, x8, #0x3333333333333333
+; CHECK-NONEON-NEXT: add x8, x9, x8
+; CHECK-NONEON-NEXT: add x8, x8, x8, lsr #4
+; CHECK-NONEON-NEXT: and x8, x8, #0xf0f0f0f0f0f0f0f
+; CHECK-NONEON-NEXT: mov x9, #72340172838076673
+; CHECK-NONEON-NEXT: mul x8, x8, x9
+; CHECK-NONEON-NEXT: lsr x8, x8, #56
+; CHECK-NONEON-NEXT: cmp x8, #1 // =1
+; CHECK-NONEON-NEXT: cset w0, ne
+; CHECK-NONEON-NEXT: ret
+ %count = tail call i64 @llvm.ctpop.i64(i64 %x)
+ %cmp = icmp ne i64 %count, 1
+ %conv = zext i1 %cmp to i32
+ ret i32 %conv
+}
+
declare i32 @llvm.ctpop.i32(i32) nounwind readnone
declare i64 @llvm.ctpop.i64(i64) nounwind readnone
Modified: llvm/trunk/test/CodeGen/X86/ctpop-combine.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ctpop-combine.ll?rev=364314&r1=364313&r2=364314&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/ctpop-combine.ll (original)
+++ llvm/trunk/test/CodeGen/X86/ctpop-combine.ll Tue Jun 25 06:37:16 2019
@@ -135,3 +135,43 @@ define i32 @ctpop_eq_one(i64 %x) nounwin
%conv = zext i1 %cmp to i32
ret i32 %conv
}
+
+define i32 @ctpop_ne_one(i64 %x) nounwind readnone {
+; POPCOUNT-LABEL: ctpop_ne_one:
+; POPCOUNT: # %bb.0:
+; POPCOUNT-NEXT: popcntq %rdi, %rcx
+; POPCOUNT-NEXT: xorl %eax, %eax
+; POPCOUNT-NEXT: cmpq $1, %rcx
+; POPCOUNT-NEXT: setne %al
+; POPCOUNT-NEXT: retq
+;
+; NO-POPCOUNT-LABEL: ctpop_ne_one:
+; NO-POPCOUNT: # %bb.0:
+; NO-POPCOUNT-NEXT: movq %rdi, %rax
+; NO-POPCOUNT-NEXT: shrq %rax
+; NO-POPCOUNT-NEXT: movabsq $6148914691236517205, %rcx # imm = 0x5555555555555555
+; NO-POPCOUNT-NEXT: andq %rax, %rcx
+; NO-POPCOUNT-NEXT: subq %rcx, %rdi
+; NO-POPCOUNT-NEXT: movabsq $3689348814741910323, %rax # imm = 0x3333333333333333
+; NO-POPCOUNT-NEXT: movq %rdi, %rcx
+; NO-POPCOUNT-NEXT: andq %rax, %rcx
+; NO-POPCOUNT-NEXT: shrq $2, %rdi
+; NO-POPCOUNT-NEXT: andq %rax, %rdi
+; NO-POPCOUNT-NEXT: addq %rcx, %rdi
+; NO-POPCOUNT-NEXT: movq %rdi, %rax
+; NO-POPCOUNT-NEXT: shrq $4, %rax
+; NO-POPCOUNT-NEXT: addq %rdi, %rax
+; NO-POPCOUNT-NEXT: movabsq $1085102592571150095, %rcx # imm = 0xF0F0F0F0F0F0F0F
+; NO-POPCOUNT-NEXT: andq %rax, %rcx
+; NO-POPCOUNT-NEXT: movabsq $72340172838076673, %rdx # imm = 0x101010101010101
+; NO-POPCOUNT-NEXT: imulq %rcx, %rdx
+; NO-POPCOUNT-NEXT: shrq $56, %rdx
+; NO-POPCOUNT-NEXT: xorl %eax, %eax
+; NO-POPCOUNT-NEXT: cmpq $1, %rdx
+; NO-POPCOUNT-NEXT: setne %al
+; NO-POPCOUNT-NEXT: retq
+ %count = tail call i64 @llvm.ctpop.i64(i64 %x)
+ %cmp = icmp ne i64 %count, 1
+ %conv = zext i1 %cmp to i32
+ ret i32 %conv
+}
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