[PATCH] D63551: [GlobalISel] Accept multiple vregs for lowerCall's arguments
Diana Picus via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 25 03:43:46 PDT 2019
rovka added a comment.
Hi Amara,
Is something like this OK for intrinsics: https://reviews.llvm.org/differential/diff/206394/ ? It has the disadvantage that if we have an intrinsic with 2 aggregate args, it will be hard to tell where one of them ends and the next one begins. OTOH, I'm having trouble finding intrinsics with even one aggregate parameter, and in fact just using getOrCreateVReg there doesn't cause check-all to crash (nor the test-suite, nor selfhost at -O0 on AArch64).
Alternatively, we could preserve the old interface here and try to move pack/unpackRegs to utils, where we can use them from both the IRTranslator and CallLowering.
Either way, it would be nice to be able to add a test-case before changing this interface, but like I said I don't really know my way around intrinsics that well. Any suggestions?
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