[PATCH] D63731: [AMDGPU] Prevent VGPR copies from moving across the EXEC mask definitions
Alexander via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 24 12:00:06 PDT 2019
alex-t marked 2 inline comments as done.
alex-t added inline comments.
================
Comment at: lib/Target/AMDGPU/SIFoldOperands.cpp:502-508
+ MachineInstr::mop_iterator ImpOpI = UseMI->implicit_operands().begin();
+ MachineInstr::mop_iterator ImpOpE = UseMI->implicit_operands().end();
+ while (ImpOpI != ImpOpE) {
+ MachineInstr::mop_iterator Tmp = ImpOpI;
+ ImpOpI++;
+ UseMI->RemoveOperand(UseMI->getOperandNo(Tmp));
+ }
----------------
arsenm wrote:
> Blindly stripping off any implicit_operands could be error prone. We do use other implicit operands on V_MOV_B32 for indirect register indexing
This is done just before calling MachineInstr::addImplicitUseDefOperands().
Also, this is under the "if" condition UseMI->isCopy() so not V_MOV exist so far.
================
Comment at: lib/Target/AMDGPU/SIInstrInfo.cpp:3923-3930
+ bool ImpDef = Def->isImplicitDef();
+ while (!ImpDef && Def && Def->isCopy()) {
+ Def = MRI.getUniqueVRegDef(Def->getOperand(1).getReg());
+ ImpDef = Def && Def->isImplicitDef();
+ }
+ if (!RI.isSGPRClass(DstRC) && !Copy->readsRegister(AMDGPU::EXEC, &RI) &&
+ !ImpDef)
----------------
arsenm wrote:
> I don't see why this is necessary
To prevent moving VGPR copies across the EXEC definitions
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D63731/new/
https://reviews.llvm.org/D63731
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