[llvm] r364224 - [InstCombine] Regenerate test pr17827. NFCI.
Huihui Zhang via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 24 12:49:42 PDT 2019
Author: huihuiz
Date: Mon Jun 24 12:49:42 2019
New Revision: 364224
URL: http://llvm.org/viewvc/llvm-project?rev=364224&view=rev
Log:
[InstCombine] Regenerate test pr17827. NFCI.
Prep work for upcoming patch D63505.
Modified:
llvm/trunk/test/Transforms/InstCombine/pr17827.ll
Modified: llvm/trunk/test/Transforms/InstCombine/pr17827.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/pr17827.ll?rev=364224&r1=364223&r2=364224&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/pr17827.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/pr17827.ll Mon Jun 24 12:49:42 2019
@@ -4,7 +4,7 @@
; With left shift, the comparison should not be modified.
define i1 @test_shift_and_cmp_not_changed1(i8 %p) {
; CHECK-LABEL: @test_shift_and_cmp_not_changed1(
-; CHECK-NEXT: [[SHLP:%.*]] = shl i8 %p, 5
+; CHECK-NEXT: [[SHLP:%.*]] = shl i8 [[P:%.*]], 5
; CHECK-NEXT: [[ANDP:%.*]] = and i8 [[SHLP]], -64
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[ANDP]], 32
; CHECK-NEXT: ret i1 [[CMP]]
@@ -18,7 +18,7 @@ define i1 @test_shift_and_cmp_not_change
; With arithmetic right shift, the comparison should not be modified.
define i1 @test_shift_and_cmp_not_changed2(i8 %p) {
; CHECK-LABEL: @test_shift_and_cmp_not_changed2(
-; CHECK-NEXT: [[SHLP:%.*]] = ashr i8 %p, 5
+; CHECK-NEXT: [[SHLP:%.*]] = ashr i8 [[P:%.*]], 5
; CHECK-NEXT: [[ANDP:%.*]] = and i8 [[SHLP]], -64
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[ANDP]], 32
; CHECK-NEXT: ret i1 [[CMP]]
@@ -33,7 +33,7 @@ define i1 @test_shift_and_cmp_not_change
; The extra input parameter should be optimized away.
define i1 @test_shift_and_cmp_changed1(i8 %p, i8 %q) {
; CHECK-LABEL: @test_shift_and_cmp_changed1(
-; CHECK-NEXT: [[ANDP:%.*]] = shl i8 %p, 5
+; CHECK-NEXT: [[ANDP:%.*]] = shl i8 [[P:%.*]], 5
; CHECK-NEXT: [[SHL:%.*]] = and i8 [[ANDP]], -64
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[SHL]], 32
; CHECK-NEXT: ret i1 [[CMP]]
@@ -66,7 +66,7 @@ define <2 x i1> @test_shift_and_cmp_chan
; Unsigned compare allows a transformation to compare against 0.
define i1 @test_shift_and_cmp_changed2(i8 %p) {
; CHECK-LABEL: @test_shift_and_cmp_changed2(
-; CHECK-NEXT: [[ANDP:%.*]] = and i8 %p, 6
+; CHECK-NEXT: [[ANDP:%.*]] = and i8 [[P:%.*]], 6
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[ANDP]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -78,7 +78,7 @@ define i1 @test_shift_and_cmp_changed2(i
define <2 x i1> @test_shift_and_cmp_changed2_vec(<2 x i8> %p) {
; CHECK-LABEL: @test_shift_and_cmp_changed2_vec(
-; CHECK-NEXT: [[ANDP:%.*]] = and <2 x i8> %p, <i8 6, i8 6>
+; CHECK-NEXT: [[ANDP:%.*]] = and <2 x i8> [[P:%.*]], <i8 6, i8 6>
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[ANDP]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
@@ -91,7 +91,7 @@ define <2 x i1> @test_shift_and_cmp_chan
; nsw on the shift should not affect the comparison.
define i1 @test_shift_and_cmp_changed3(i8 %p) {
; CHECK-LABEL: @test_shift_and_cmp_changed3(
-; CHECK-NEXT: [[SHLP:%.*]] = shl nsw i8 %p, 5
+; CHECK-NEXT: [[SHLP:%.*]] = shl nsw i8 [[P:%.*]], 5
; CHECK-NEXT: [[ANDP:%.*]] = and i8 [[SHLP]], -64
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[ANDP]], 32
; CHECK-NEXT: ret i1 [[CMP]]
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