[PATCH] D62963: [DAGCombine] GetNegatedExpression - constant float vector support (PR42105)

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai added a comment.

This breaks (at least) PowerPC with the typical DAG Combine cycle (i.e. one combine undoes the other in a cycle). Here's a minimal test case to show this:

  define dso_local <4 x double> @sub(double %b, double* nocapture readonly %ptr) local_unnamed_addr {
  entry:
    %arrayidx = getelementptr inbounds double, double* %ptr, i64 45320
    %0 = load double, double* %arrayidx, align 4
    %vecinit = insertelement <4 x double> undef, double %0, i32 0
    %arrayidx1 = getelementptr inbounds double, double* %ptr, i64 176
    %1 = load double, double* %arrayidx1, align 4
    %vecinit2 = insertelement <4 x double> %vecinit, double %1, i32 1
    %arrayidx3 = getelementptr inbounds double, double* %ptr, i64 2734
    %2 = load double, double* %arrayidx3, align 4
    %vecinit4 = insertelement <4 x double> %vecinit2, double %2, i32 2
    %arrayidx5 = getelementptr inbounds double, double* %ptr, i64 7
    %3 = load double, double* %arrayidx5, align 4
    %vecinit6 = insertelement <4 x double> %vecinit4, double %3, i32 3
    %splat.splatinsert = insertelement <4 x double> undef, double %b, i32 0
    %splat.splat = shufflevector <4 x double> %splat.splatinsert, <4 x double> undef, <4 x i32> zeroinitializer
    %div = fdiv fast <4 x double> %vecinit6, %splat.splat
    %sub = fsub fast <4 x double> <double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00>, %div
    ret <4 x double> %sub
  }

Compile with `llc -mtriple=powerpc64le-unknown-unknown`


Repository:
  rL LLVM

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