[PATCH] D63724: [AMDGPU] Allow any value in unused src0 field in v_nop

[Tim Renouf via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL364208: [AMDGPU] Allow any value in unused src0 field in v_nop (authored by tpr, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D63724?vs=206240&id=206260#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63724/new/

https://reviews.llvm.org/D63724

Files:
  llvm/trunk/lib/Target/AMDGPU/VOP1Instructions.td
  llvm/trunk/test/MC/Disassembler/AMDGPU/nop.txt
  llvm/trunk/test/MC/Disassembler/AMDGPU/vop1.txt
  llvm/trunk/test/MC/Disassembler/AMDGPU/vop1_vi.txt


Index: llvm/trunk/test/MC/Disassembler/AMDGPU/nop.txt
===================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/nop.txt
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/nop.txt
@@ -2,3 +2,6 @@
 
 # CHECK: v_nop              ; encoding: [0x00,0x00,0x00,0x7e]
 0x00 0x00 0x00 0x7e
+
+# CHECK: v_nop              ; encoding: [0x00,0x00,0x00,0x7e]
+0x80 0x00 0x00 0x7e
Index: llvm/trunk/test/MC/Disassembler/AMDGPU/vop1.txt
===================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/vop1.txt
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/vop1.txt
@@ -3,6 +3,9 @@
 # CHECK: v_nop              ; encoding: [0x00,0x00,0x00,0x7e]
 0x00 0x00 0x00 0x7e
 
+# CHECK: v_nop              ; encoding: [0x00,0x00,0x00,0x7e]
+0x80 0x00 0x00 0x7e
+
 # CHECK: v_clrexcp                       ; encoding: [0x00,0x6a,0x00,0x7e]
 0x00 0x6a 0x00 0x7e
 
Index: llvm/trunk/test/MC/Disassembler/AMDGPU/vop1_vi.txt
===================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/vop1_vi.txt
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/vop1_vi.txt
@@ -6,6 +6,9 @@
 # VI: v_nop ; encoding: [0x00,0x00,0x00,0x7e]
 0x00 0x00 0x00 0x7e
 
+# VI: v_nop ; encoding: [0x00,0x00,0x00,0x7e]
+0x80 0x00 0x00 0x7e
+
 # VI:   v_clrexcp ; encoding: [0x00,0x6a,0x00,0x7e]
 0x00 0x6a 0x00 0x7e
 
Index: llvm/trunk/lib/Target/AMDGPU/VOP1Instructions.td
===================================================================
--- llvm/trunk/lib/Target/AMDGPU/VOP1Instructions.td
+++ llvm/trunk/lib/Target/AMDGPU/VOP1Instructions.td
@@ -14,7 +14,7 @@
   bits<8> vdst;
   bits<9> src0;
 
-  let Inst{8-0}   = !if(P.HasSrc0, src0{8-0}, 0);
+  let Inst{8-0}   = !if(P.HasSrc0, src0{8-0}, ?);
   let Inst{16-9}  = op;
   let Inst{24-17} = !if(P.EmitDst, vdst{7-0}, 0);
   let Inst{31-25} = 0x3f; //encoding


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