[PATCH] D63407: AMDGPU/GlobalISel: Fix RegBankSelect for s1 sext/zext/anyext
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 24 06:04:58 PDT 2019
arsenm marked an inline comment as done.
arsenm added a comment.
ping
================
Comment at: lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp:841-842
+ const RegisterBank *SrcBank = getRegBank(SrcReg, MRI, *TRI);
+ if (SrcBank->getID() == AMDGPU::SCCRegBankID ||
+ SrcBank->getID() == AMDGPU::VCCRegBankID) {
+ const RegisterBank *DstBank = getRegBank(DstReg, MRI, *TRI);
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I'm not sure if this case should really be allowed
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D63407/new/
https://reviews.llvm.org/D63407
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