[PATCH] D63675: [InstCombine] Simplify icmp ult/uge (shl %x, C2), C1 iff C1 is power of two -> icmp eq/ne (and %x, (lshr -C1, C2)), 0.

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added a comment.

Nice, some comments.



================
Comment at: llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp:2032
+  // Simplify 'shl' inequality test into 'and' equality test.
+  // (X l<< C2) u</u>= C1 iff C1 is power of two  ->  X & (-C1 l>> C2) ==/!= 0.
+  if (Cmp.isUnsigned()) {
----------------
This comment is for the second fold, for the first fold the comment is
```
  // (X l<< C2) u<=/u> C1 iff C1+1 is power of two  ->  X & (~C1 l>> C2) ==/!= 0.
```


================
Comment at: llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp:2033
+  // (X l<< C2) u</u>= C1 iff C1 is power of two  ->  X & (-C1 l>> C2) ==/!= 0.
+  if (Cmp.isUnsigned()) {
+    if ((C + 1).isPowerOf2() &&
----------------
```
  if (Cmp.isUnsigned() && Shl.hasOneUse()) {
```



================
Comment at: llvm/test/Transforms/InstCombine/shl-unsigned-cmp-const.ll:168-169
 ; CHECK-NEXT:    store i8 [[SHL]], i8* [[P:%.*]], align 1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i8 [[SHL]], 64
+; CHECK-NEXT:    [[TMP1:%.*]] = and i8 [[X]], 6
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 [[TMP1]], 0
 ; CHECK-NEXT:    ret i1 [[CMP]]
----------------
In this case, these folds **should** be limited to single-use `shl`, because we produce 2 instructions,
and only ensure that we replace a single instruction, thus we might increase instruction count.


Repository:
  rL LLVM

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  https://reviews.llvm.org/D63675/new/

https://reviews.llvm.org/D63675