[llvm] r364083 - [NFC] Update shl-sub tests

[David Bolvansky via llvm-commits]

Author: xbolva00
Date: Fri Jun 21 10:51:18 2019
New Revision: 364083

URL: http://llvm.org/viewvc/llvm-project?rev=364083&view=rev
Log:
[NFC] Update shl-sub tests

Modified:
    llvm/trunk/test/Transforms/InstCombine/shl-sub.ll

Modified: llvm/trunk/test/Transforms/InstCombine/shl-sub.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shl-sub.ll?rev=364083&r1=364082&r2=364083&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/shl-sub.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/shl-sub.ll Fri Jun 21 10:51:18 2019
@@ -54,6 +54,16 @@ define <2 x i64> @shl_sub_i64_vec(<2 x i
   ret <2 x i64> %r
 }
 
+define <3 x i64> @shl_sub_i64_vec_undef(<3 x i64> %x) {
+; CHECK-LABEL: @shl_sub_i64_vec_undef(
+; CHECK-NEXT:    [[R:%.*]] = lshr <3 x i64> <i64 -9223372036854775808, i64 -9223372036854775808, i64 -9223372036854775808>, [[X:%.*]]
+; CHECK-NEXT:    ret <3 x i64> [[R]]
+;
+  %s = sub <3 x i64> <i64 63, i64 63, i64 63>, %x
+  %r = shl <3 x i64> <i64 1, i64 undef, i64 1>, %s
+  ret <3 x i64> %r
+}
+
 ; Negative tests
 
 define i32 @shl_bad_sub_i32(i32 %x) {
@@ -144,8 +154,8 @@ define <2 x i64> @bad_shl_sub_i64_vec(<2
   ret <2 x i64> %r
 }
 
-define <3 x i64> @shl_sub_i64_vec_undef0(<3 x i64> %x) {
-; CHECK-LABEL: @shl_sub_i64_vec_undef0(
+define <3 x i64> @shl_sub_i64_vec_undef_bad(<3 x i64> %x) {
+; CHECK-LABEL: @shl_sub_i64_vec_undef_bad(
 ; CHECK-NEXT:    [[S:%.*]] = sub <3 x i64> <i64 63, i64 undef, i64 63>, [[X:%.*]]
 ; CHECK-NEXT:    [[R:%.*]] = shl <3 x i64> <i64 1, i64 1, i64 1>, [[S]]
 ; CHECK-NEXT:    ret <3 x i64> [[R]]
@@ -155,19 +165,8 @@ define <3 x i64> @shl_sub_i64_vec_undef0
   ret <3 x i64> %r
 }
 
-define <3 x i64> @shl_sub_i64_vec_undef1(<3 x i64> %x) {
-; CHECK-LABEL: @shl_sub_i64_vec_undef1(
-; CHECK-NEXT:    [[S:%.*]] = sub <3 x i64> <i64 63, i64 undef, i64 63>, [[X:%.*]]
-; CHECK-NEXT:    [[R:%.*]] = shl <3 x i64> <i64 1, i64 undef, i64 1>, [[S]]
-; CHECK-NEXT:    ret <3 x i64> [[R]]
-;
-  %s = sub <3 x i64> <i64 63, i64 undef, i64 63>, %x
-  %r = shl <3 x i64> <i64 1, i64 undef, i64 1>, %s
-  ret <3 x i64> %r
-}
-
-define <3 x i64> @shl_sub_i64_vec_undef2(<3 x i64> %x) {
-; CHECK-LABEL: @shl_sub_i64_vec_undef2(
+define <3 x i64> @shl_sub_i64_vec_undef_bad2(<3 x i64> %x) {
+; CHECK-LABEL: @shl_sub_i64_vec_undef_bad2(
 ; CHECK-NEXT:    [[S:%.*]] = sub <3 x i64> <i64 63, i64 undef, i64 63>, [[X:%.*]]
 ; CHECK-NEXT:    [[R:%.*]] = shl <3 x i64> <i64 1, i64 undef, i64 1>, [[S]]
 ; CHECK-NEXT:    ret <3 x i64> [[R]]