[PATCH] D62677: [ARM] Add a batch of similarly encoded MVE instructions.

[Oliver Stannard (Linaro) via Phabricator via llvm-commits]

ostannard added inline comments.


================
Comment at: llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:6704
                       ARMOperand::CreateToken(StringRef("vcvtn"), MLoc));
+    } else if (Mnemonic.startswith("vmul") && PredicationCode == ARMCC::LT &&
+               !shouldOmitVectorPredicateOperand(Mnemonic, Operands)) {
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I think this needs to check the mnemonic is exactly "vmul", not just startswith, because we emit a literal "vmullt" below.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D62677/new/

https://reviews.llvm.org/D62677