[PATCH] D63628: AMD K10 (Barcelona) Initial Scheduler model
Javed Absar via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 21 01:39:44 PDT 2019
javed.absar added inline comments.
================
Comment at: lib/Target/X86/X86ScheduleBarcelona.td:185
+ list<int> Res, int UOps> {
+ defm : BnWriteRes<SchedRW, !listconcat([IntScheduler], ExePorts),
+ Lat, !listconcat([1], Res), UOps>;
----------------
You can use 'listA # listB' to concatenate to improve readability
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D63628/new/
https://reviews.llvm.org/D63628
More information about the llvm-commits
mailing list