[PATCH] D63585: [ARM GlobalISel] Add support for s64 G_ADD and G_SUB.

[Eli Friedman via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL363989: [ARM GlobalISel] Add support for s64 G_ADD and G_SUB. (authored by efriedma, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D63585?vs=205726&id=205907#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63585/new/

https://reviews.llvm.org/D63585

Files:
  llvm/trunk/lib/Target/ARM/ARMLegalizerInfo.cpp
  llvm/trunk/lib/Target/ARM/ARMRegisterBankInfo.cpp


Index: llvm/trunk/lib/Target/ARM/ARMRegisterBankInfo.cpp
===================================================================
--- llvm/trunk/lib/Target/ARM/ARMRegisterBankInfo.cpp
+++ llvm/trunk/lib/Target/ARM/ARMRegisterBankInfo.cpp
@@ -228,7 +228,15 @@
 
   switch (Opc) {
   case G_ADD:
-  case G_SUB:
+  case G_SUB: {
+    // Integer operations where the source and destination are in the
+    // same register class.
+    LLT Ty = MRI.getType(MI.getOperand(0).getReg());
+    OperandsMapping = Ty.getSizeInBits() == 64
+                          ? &ARM::ValueMappings[ARM::DPR3OpsIdx]
+                          : &ARM::ValueMappings[ARM::GPR3OpsIdx];
+    break;
+  }
   case G_MUL:
   case G_AND:
   case G_OR:
Index: llvm/trunk/lib/Target/ARM/ARMLegalizerInfo.cpp
===================================================================
--- llvm/trunk/lib/Target/ARM/ARMLegalizerInfo.cpp
+++ llvm/trunk/lib/Target/ARM/ARMLegalizerInfo.cpp
@@ -84,10 +84,19 @@
   getActionDefinitionsBuilder({G_SEXT, G_ZEXT, G_ANYEXT})
       .legalForCartesianProduct({s8, s16, s32}, {s1, s8, s16});
 
-  getActionDefinitionsBuilder({G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR})
+  getActionDefinitionsBuilder({G_MUL, G_AND, G_OR, G_XOR})
       .legalFor({s32})
       .minScalar(0, s32);
 
+  if (ST.hasNEON())
+    getActionDefinitionsBuilder({G_ADD, G_SUB})
+        .legalFor({s32, s64})
+        .minScalar(0, s32);
+  else
+    getActionDefinitionsBuilder({G_ADD, G_SUB})
+        .legalFor({s32})
+        .minScalar(0, s32);
+
   getActionDefinitionsBuilder({G_ASHR, G_LSHR, G_SHL})
     .legalFor({{s32, s32}})
     .minScalar(0, s32)


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