[PATCH] D63624: [PowerPC] Exploit single instruction load-and-splat for word and doubleword
Nemanja Ivanovic via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 20 14:06:37 PDT 2019
nemanjai created this revision.
nemanjai added reviewers: hfinkel, jsji, rzurob, saghir.
Herald added a subscriber: kbarton.
Herald added a project: LLVM.
nemanjai marked an inline comment as done.
nemanjai added inline comments.
================
Comment at: test/CodeGen/PowerPC/power9-moves-and-splats.ll:15
; CHECK-NEXT: blr
-
+;
; CHECK-BE-LABEL: test1:
----------------
Please forgive the trivial changes in this test case. The script that produces the checks apparently behaves slightly differently now and I would prefer to leave the test case exactly as produced by the script.
We currently produce a load, followed by (possibly a move for integers and) a splat as separate instructions. VSX has always had a splatting load for doublewords, but as of Power9, we have it for words as well. This patch just exploits these instructions.
Repository:
rL LLVM
https://reviews.llvm.org/D63624
Files:
lib/Target/PowerPC/PPCISelLowering.cpp
lib/Target/PowerPC/PPCISelLowering.h
lib/Target/PowerPC/PPCInstrVSX.td
test/CodeGen/PowerPC/VSX-XForm-Scalars.ll
test/CodeGen/PowerPC/build-vector-tests.ll
test/CodeGen/PowerPC/load-and-splat.ll
test/CodeGen/PowerPC/power9-moves-and-splats.ll
test/CodeGen/PowerPC/qpx-load-splat.ll
test/CodeGen/PowerPC/swaps-le-7.ll
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