[PATCH] D63587: [AArch64][GlobalISel] Make s8 and s16 G_CONSTANTs legal

[Amara Emerson via Phabricator via llvm-commits]

aemerson created this revision.
aemerson added reviewers: arsenm, paquette, dsanders, rovka, qcolombet.
aemerson added a project: LLVM.
Herald added subscribers: Petar.Avramovic, jfb, hiraditya, kristof.beyls, javed.absar, nhaehnle, wdng, jvesely.

We sometimes get poor code size because constants of types < 32b are legalized
as 32 bit G_CONSTANTs with a truncate to fit. This works but means that the
localizer can no longer sink them (although it's possible to extend it to do so).

On AArch64 however s8 and s16 constants can be selected in the same way as s32
constants, with a mov pseudo into a W register. If we make s8 and s16 constants
legal then we can avoid unnecessary truncates, they can be CSE'd, and the
localizer can sink them as normal.

There is a caveat: if the user of a smaller constant has to widen the sources,
we end up with an anyext of the smaller typed G_CONSTANT. This can cause
regressions because of the additional extend and missed pattern matching. To
remedy this, there's a new artifact combiner to generate the wider G_CONSTANT
if it's legal for the target.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D63587

Files:
  llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
  llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
  llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-atomicrmw.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-merge-values.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalizer-combiner-zext-trunc-crash.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalizer-combiner.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-constant.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir
  llvm/test/CodeGen/X86/GlobalISel/legalize-constant.mir

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