[PATCH] D63510: [LiveInterval] Removed bogus empty subrange assert

Tim Renouf via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 19 12:01:14 PDT 2019


tpr marked an inline comment as done.
tpr added inline comments.


================
Comment at: test/CodeGen/AMDGPU/empty-subrange.mir:1
+# RUN: llc -mtriple=amdgcn -mcpu=gfx802 -verify-machineinstrs -start-after amdgpu-isel -o - %s | FileCheck -check-prefix=GCN %s
+#
----------------
arsenm wrote:
> tpr wrote:
> > arsenm wrote:
> > > Should be restricted to a narrow range of passes in regalloc
> > I tried capturing mir just before the live intervals before regalloc, which is the one where it fell over, and running from there, but it did not reproduce the failure. I think it is too sensitive to what order it sees the MOs when iterating, which would be potentially different between reading a mir file and getting real output from earlier passes.
> This makes getting this test reduced even more important then. You've dropped all of the machineFunctionInfo, maybe some of those fields help? Spending hours debugging why I couldn't reproduce something like this is why I finally implemented the serialization for it. We don't preserve everything that matters yet
No; I chopped the machineFunctionInfo out after attempting to reproduce at various stages.


Repository:
  rL LLVM

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  https://reviews.llvm.org/D63510/new/

https://reviews.llvm.org/D63510





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