[PATCH] D62685: [RISCV] Add pseudo instruction for calls with explicit register

[Lewis Revill via Phabricator via llvm-commits]

lewis-revill updated this revision to Diff 205616.
lewis-revill added a comment.

Quick end-of-file newline fix


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D62685/new/

https://reviews.llvm.org/D62685

Files:
  lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
  lib/Target/RISCV/RISCVInstrInfo.cpp
  lib/Target/RISCV/RISCVInstrInfo.td
  test/MC/RISCV/function-call-invalid.s
  test/MC/RISCV/function-call.s

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