[PATCH] D54296: [RISCV] Lower inline asm constraint A for RISC-V
Lewis Revill via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 19 03:30:18 PDT 2019
lewis-revill added inline comments.
================
Comment at: lib/Target/RISCV/RISCVISelDAGToDAG.cpp:175
return false;
+ case InlineAsm::Constraint_A:
+ OutOps.push_back(Op);
----------------
asb wrote:
> Doesn't need to be an extra case given the body is the same as the others.
I added this to differentiate between the 'm' and 'A' because of the possibility of more complex 'm' constraints like @jrtc27 mentioned, IE including both an offset and a base.
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D54296/new/
https://reviews.llvm.org/D54296
More information about the llvm-commits
mailing list