[PATCH] D63494: [AMDGPU] Fix for branch offset hardware workaround

Ryan Taylor via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 18 07:19:57 PDT 2019


rtaylor created this revision.
Herald added subscribers: llvm-commits, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl, arsenm.
Herald added a project: LLVM.

This fixes a hardware bug that makes a branch offset of 0x3f unsafe.
This replaces the 32 bit branch with offset 0x3f to a 64 bit
instruction that includes the same 32 bit branch and the encoding
for a s_nop 0 to follow. The relaxer than modifies the offsets
accordingly.

Change-Id: I10b7aed99d651f8159401b01bb421f105fa6288e


Repository:
  rL LLVM

https://reviews.llvm.org/D63494

Files:
  lib/Target/AMDGPU/AMDGPU.td
  lib/Target/AMDGPU/AMDGPUSubtarget.cpp
  lib/Target/AMDGPU/AMDGPUSubtarget.h
  lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
  lib/Target/AMDGPU/SOPInstructions.td
  test/MC/AMDGPU/offsetbug.s

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D63494.205334.patch
Type: text/x-patch
Size: 12924 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190618/bff7c9f5/attachment-0001.bin>


More information about the llvm-commits mailing list