[llvm] r363675 - AMDGPU: Change API for checking for exec modification
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 18 05:48:36 PDT 2019
Author: arsenm
Date: Tue Jun 18 05:48:36 2019
New Revision: 363675
URL: http://llvm.org/viewvc/llvm-project?rev=363675&view=rev
Log:
AMDGPU: Change API for checking for exec modification
Invert the name and return value to better reflect the imprecise
nature.
Force passing in the DefMI, since it's known in the 2 users and could
possibly fail for an arbitrary vreg.
Allow specifying a specific user instruction. Scan through use
instructions, instead of use operands. Add scan thresholds instead of
searching infinitely.
Stop using a set to track seen uses. I didn't understand this usage,
or why it would not check the last use. I don't think the use list has
any particular order.
Modified:
llvm/trunk/lib/Target/AMDGPU/GCNDPPCombine.cpp
llvm/trunk/lib/Target/AMDGPU/SIFoldOperands.cpp
llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp
llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.h
Modified: llvm/trunk/lib/Target/AMDGPU/GCNDPPCombine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/GCNDPPCombine.cpp?rev=363675&r1=363674&r2=363675&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/GCNDPPCombine.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/GCNDPPCombine.cpp Tue Jun 18 05:48:36 2019
@@ -331,7 +331,7 @@ bool GCNDPPCombine::combineDPPMov(Machin
auto *DstOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::vdst);
assert(DstOpnd && DstOpnd->isReg());
auto DPPMovReg = DstOpnd->getReg();
- if (!isEXECMaskConstantBetweenDefAndUses(DPPMovReg, *MRI)) {
+ if (execMayBeModifiedBeforeUse(*MRI, DPPMovReg, MovMI)) {
LLVM_DEBUG(dbgs() << " failed: EXEC mask should remain the same"
" for all uses\n");
return false;
Modified: llvm/trunk/lib/Target/AMDGPU/SIFoldOperands.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIFoldOperands.cpp?rev=363675&r1=363674&r2=363675&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIFoldOperands.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIFoldOperands.cpp Tue Jun 18 05:48:36 2019
@@ -516,8 +516,10 @@ void SIFoldOperands::foldOperand(
// =>
// %sgpr = S_MOV_B32 imm
if (FoldingImm) {
- if (!isEXECMaskConstantBetweenDefAndUses(
- UseMI->getOperand(UseOpIdx).getReg(), *MRI))
+ if (execMayBeModifiedBeforeUse(*MRI,
+ UseMI->getOperand(UseOpIdx).getReg(),
+ *OpToFold.getParent(),
+ UseMI))
return;
UseMI->setDesc(TII->get(AMDGPU::S_MOV_B32));
@@ -527,8 +529,10 @@ void SIFoldOperands::foldOperand(
}
if (OpToFold.isReg() && TRI->isSGPRReg(*MRI, OpToFold.getReg())) {
- if (!isEXECMaskConstantBetweenDefAndUses(
- UseMI->getOperand(UseOpIdx).getReg(), *MRI))
+ if (execMayBeModifiedBeforeUse(*MRI,
+ UseMI->getOperand(UseOpIdx).getReg(),
+ *OpToFold.getParent(),
+ UseMI))
return;
// %vgpr = COPY %sgpr0
Modified: llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp?rev=363675&r1=363674&r2=363675&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp Tue Jun 18 05:48:36 2019
@@ -6073,28 +6073,49 @@ MachineInstr *llvm::getVRegSubRegDef(con
return nullptr;
}
-bool llvm::isEXECMaskConstantBetweenDefAndUses(unsigned VReg,
- const MachineRegisterInfo &MRI) {
+bool llvm::execMayBeModifiedBeforeUse(const MachineRegisterInfo &MRI,
+ unsigned VReg,
+ const MachineInstr &DefMI,
+ const MachineInstr *UseMI) {
assert(MRI.isSSA() && "Must be run on SSA");
+ assert(DefMI.definesRegister(VReg) && "wrong def instruction");
+
auto *TRI = MRI.getTargetRegisterInfo();
+ auto *DefBB = DefMI.getParent();
+
+ if (UseMI) {
+ // Don't bother searching between blocks, although it is possible this block
+ // doesn't modify exec.
+ if (UseMI->getParent() != DefBB)
+ return true;
+ } else {
+ int NumUse = 0;
+ const int MaxUseScan = 10;
- auto *DefI = MRI.getVRegDef(VReg);
- auto *BB = DefI->getParent();
+ for (auto &UseInst : MRI.use_nodbg_instructions(VReg)) {
+ if (UseInst.getParent() != DefBB)
+ return true;
- DenseSet<MachineInstr*> Uses;
- for (auto &Use : MRI.use_nodbg_operands(VReg)) {
- auto *I = Use.getParent();
- if (I->getParent() != BB)
- return false;
- Uses.insert(I);
+ if (NumUse++ > MaxUseScan)
+ return true;
+ }
}
- auto E = BB->end();
- for (auto I = std::next(DefI->getIterator()); I != E; ++I) {
- Uses.erase(&*I);
- // don't check the last use
- if (Uses.empty() || I->modifiesRegister(AMDGPU::EXEC, TRI))
- break;
+ const int MaxInstScan = 20;
+ int NumScan = 0;
+
+ // Stop scan at the use if known.
+ auto E = UseMI ? UseMI->getIterator() : DefBB->end();
+ for (auto I = std::next(DefMI.getIterator()); I != E; ++I) {
+ if (I->isDebugInstr())
+ continue;
+
+ if (NumScan++ > MaxInstScan)
+ return true;
+
+ if (I->modifiesRegister(AMDGPU::EXEC, TRI))
+ return true;
}
- return Uses.empty();
+
+ return false;
}
Modified: llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.h?rev=363675&r1=363674&r2=363675&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.h (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.h Tue Jun 18 05:48:36 2019
@@ -977,11 +977,14 @@ TargetInstrInfo::RegSubRegPair getRegSeq
MachineInstr *getVRegSubRegDef(const TargetInstrInfo::RegSubRegPair &P,
MachineRegisterInfo &MRI);
-/// \brief Return true if EXEC mask isnt' changed between the def and
-/// all uses of VReg. Currently if def and uses are in different BBs -
-/// simply return false. Should be run on SSA.
-bool isEXECMaskConstantBetweenDefAndUses(unsigned VReg,
- const MachineRegisterInfo &MRI);
+/// \brief Return false if EXEC is not changed between the def of \p VReg at \p
+/// DefMI and uses. If \p UseMI is not specified, this checks all uses of \p
+/// VReg. Should be run on SSA. Currently does not attempt to track between
+/// blocks.
+bool execMayBeModifiedBeforeUse(const MachineRegisterInfo &MRI,
+ unsigned VReg,
+ const MachineInstr &DefMI,
+ const MachineInstr *UseMI = nullptr);
namespace AMDGPU {
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