[PATCH] D63204: [AMDGPU] gfx1010 core wave32 changes

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec updated this revision to Diff 205106.
rampitec added a comment.

Rebased. Reenabled HSA metadata test disabled with previous commit due to dependency.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63204/new/

https://reviews.llvm.org/D63204

Files:
  lib/Target/AMDGPU/AMDGPU.td
  lib/Target/AMDGPU/AMDGPUInstrInfo.td
  lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
  lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
  lib/Target/AMDGPU/SIInstrInfo.h
  lib/Target/AMDGPU/SIInstrInfo.td
  lib/Target/AMDGPU/SIInstructions.td
  lib/Target/AMDGPU/SIRegisterInfo.td
  lib/Target/AMDGPU/SOPInstructions.td
  lib/Target/AMDGPU/VOP2Instructions.td
  lib/Target/AMDGPU/VOP3Instructions.td
  lib/Target/AMDGPU/VOPCInstructions.td
  test/CodeGen/AMDGPU/add3.ll
  test/CodeGen/AMDGPU/add_i1.ll
  test/CodeGen/AMDGPU/add_shl.ll
  test/CodeGen/AMDGPU/and_or.ll
  test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props-v3.ll
  test/CodeGen/AMDGPU/huge-private-buffer.ll
  test/CodeGen/AMDGPU/insert-skip-from-vcc.mir
  test/CodeGen/AMDGPU/large-work-group-promote-alloca.ll
  test/CodeGen/AMDGPU/mubuf-legalize-operands.mir
  test/CodeGen/AMDGPU/or3.ll
  test/CodeGen/AMDGPU/regbank-reassign.mir
  test/CodeGen/AMDGPU/shl_add.ll
  test/CodeGen/AMDGPU/shl_or.ll
  test/CodeGen/AMDGPU/smrd.ll
  test/CodeGen/AMDGPU/sub_i1.ll
  test/CodeGen/AMDGPU/wave32.ll
  test/CodeGen/AMDGPU/xor3.ll
  test/CodeGen/AMDGPU/xor_add.ll
  test/MC/AMDGPU/gfx10-constant-bus.s
  test/MC/AMDGPU/wave32.s
  test/MC/Disassembler/AMDGPU/gfx10-sgpr-max.txt
  test/MC/Disassembler/AMDGPU/wave32.txt

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