[llvm] r363559 - AMDGPU/GlobalISel: Fix default mapping for non-register operands

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Mon Jun 17 06:52:19 2019
New Revision: 363559

URL: http://llvm.org/viewvc/llvm-project?rev=363559&view=rev
Log:
AMDGPU/GlobalISel: Fix default mapping for non-register operands

Tests will be in future commits when new intrinsics are handled here.

Modified:
    llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp?rev=363559&r1=363558&r2=363559&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp Mon Jun 17 06:52:19 2019
@@ -917,7 +917,11 @@ AMDGPURegisterBankInfo::getDefaultMappin
   OpdsMapping[OpdIdx++] = AMDGPU::getValueMapping(Bank1, Size1);
 
   for (unsigned e = MI.getNumOperands(); OpdIdx != e; ++OpdIdx) {
-    unsigned Size = getSizeInBits(MI.getOperand(OpdIdx).getReg(), MRI, *TRI);
+    const MachineOperand &MO = MI.getOperand(OpdIdx);
+    if (!MO.isReg())
+      continue;
+
+    unsigned Size = getSizeInBits(MO.getReg(), MRI, *TRI);
     unsigned BankID = Size == 1 ? AMDGPU::VCCRegBankID : AMDGPU::VGPRRegBankID;
     OpdsMapping[OpdIdx] = AMDGPU::getValueMapping(BankID, Size);
   }