[PATCH] D63246: [X86][SSE] Prevent misaligned non-temporal vector load/store combines
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 14 16:09:00 PDT 2019
lebedev.ri added inline comments.
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:2133-2136
+ if (!!(Flags & MachineMemOperand::MOLoad) &&
+ (Align < 16 || !Subtarget.hasSSE41()))
+ return true;
+ return false;
----------------
So this says that if this is a non-temporal load of a vector,
either from a pointer that is aligned so little that we can't even make 128-bit aligned load from,
or we do not even have SSE41 (so no aligned non-temporal vector loads at all),
the underaligned loading is allowed, correct?
This kinda looks backwards to me?
I expected something like
```
if (!!(Flags & MachineMemOperand::MONonTemporal) && VT.isVector()) {
return !!(Flags & MachineMemOperand::MOLoad) &&
Align >= VT.getSizeInBytes() && Subtarget.hasSSE41());
}
```
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D63246/new/
https://reviews.llvm.org/D63246
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