[PATCH] D63076: [ELF][RISCV] Support PLT, GOT, copy and relative relocations

[Rui Ueyama via Phabricator via llvm-commits]

ruiu added inline comments.


================
Comment at: ELF/Arch/RISCV.cpp:132
+void RISCV::writePltHeader(uint8_t *Buf) const {
+  if (Config->EFlags & EF_RISCV_RVE)
+    error("PLT is not supported for RVE");
----------------
Can you add a comment saying that RV32E/RV64E is fewer number of registers and PLTs are not supported on them because some registers that the PLT stub uses don't exist?


================
Comment at: ELF/Arch/RISCV.cpp:133
+  if (Config->EFlags & EF_RISCV_RVE)
+    error("PLT is not supported for RVE");
+
----------------
Is RVE something that average RISC-V users can understand? That acronym is too short that it is not easy to google. Maybe we can refer them as `RV32E/RV64E`?


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  rLLD LLVM Linker

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  https://reviews.llvm.org/D63076/new/

https://reviews.llvm.org/D63076