[PATCH] D63169: [GlobalISel][IRTranslator] Change switch table translation to generate jump tables and range checks.

[Amara Emerson via Phabricator via llvm-commits]

aemerson created this revision.
aemerson added reviewers: paquette, arsenm, qcolombet, dsanders, Petar.Avramovic, rovka.
aemerson added a project: LLVM.
Herald added subscribers: volkan, jfb, mgrang, hiraditya, kristof.beyls, javed.absar, wdng.
aemerson added a parent revision: D63159: [GlobalISel] Add a G_BRJT opcode.

This change makes use of the newly refactored SwitchLoweringUtils code from SelectionDAG to in order to generate jump tables and range checks where appropriate.

Much of this code is ported from SDAG with some modifications. We generate G_JUMP_TABLE and G_BRJT instructions when JT opportunities are found. This means that targets which previously relied on the naive one MBB per case stmt translation will now start falling back until they add support for the new opcodes.

For range checks, we don't generate any previously unused operations. This just recognizes contiguous ranges of case values and generates a single block per range. Single case value blocks are just a special case of ranges so we get that support almost for free.

There are still some optimizations missing that I haven't ported over, and bit-tests are also unimplemented. This patch series is already complex enough.

Actual arm64 support for selection of jump tables is coming in a later patch.


Repository:
  rL LLVM

https://reviews.llvm.org/D63169

Files:
  llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
  llvm/include/llvm/CodeGen/SwitchLoweringUtils.h
  llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
  llvm/lib/CodeGen/SwitchLoweringUtils.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll
  llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll

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