[PATCH] D63160: [AMDGPU] Custom lower INSERT_SUBVECTOR v3, v4, v5, v8

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:348
+  setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v8f32, Custom);
 
   // BUFFER/FLAT_ATOMIC_CMP_SWAP on GCN GPUs needs input marshalling,
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Should this handle MVT::Other and get all the types? What happens with v6i32 or v4i16?


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Comment at: test/CodeGen/AMDGPU/insert-subvector-unused-scratch.ll:6
+
+; GCN: ScratchSize: 0
+define amdgpu_kernel void @store_v3i32(<3 x i32> addrspace(3)* %out, <3 x i32> %a) nounwind {
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Should check more, even if generated


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Comment at: test/CodeGen/AMDGPU/insert-subvector-unused-scratch.ll:12
+  ret void
+}
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No case for 5 x?


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63160/new/

https://reviews.llvm.org/D63160