[PATCH] D56772: [MIR] Add simple PRE pass to MachineCSE

[Anton Afanasyev via Phabricator via llvm-commits]

anton-afanasyev added a comment.

The issue actually is not with this instruction, but it's related to exception handling. Hoisted instruction is inserted before `getFirstTerminator()`, but there could be `EH_LABEL`'s which are not terminators, but could change control flow.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D56772/new/

https://reviews.llvm.org/D56772