[llvm] r362907 - [NFC] Added test from PR19758

David Bolvansky via llvm-commits llvm-commits at lists.llvm.org
Sun Jun 9 08:12:46 PDT 2019


Author: xbolva00
Date: Sun Jun  9 08:12:46 2019
New Revision: 362907

URL: http://llvm.org/viewvc/llvm-project?rev=362907&view=rev
Log:
[NFC] Added test from PR19758

Added:
    llvm/trunk/test/CodeGen/X86/tree_way_unsigned_cmp.ll

Added: llvm/trunk/test/CodeGen/X86/tree_way_unsigned_cmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tree_way_unsigned_cmp.ll?rev=362907&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tree_way_unsigned_cmp.ll (added)
+++ llvm/trunk/test/CodeGen/X86/tree_way_unsigned_cmp.ll Sun Jun  9 08:12:46 2019
@@ -0,0 +1,68 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
+
+; PR19758
+
+define i32 @unsigned_tree_way_cmp_i32(i32 %a, i32 %b) {
+; CHECK-LABEL: unsigned_tree_way_cmp_i32:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %ecx, %ecx
+; CHECK-NEXT:    cmpl %esi, %edi
+; CHECK-NEXT:    seta %cl
+; CHECK-NEXT:    movl $-1, %eax
+; CHECK-NEXT:    cmovael %ecx, %eax
+; CHECK-NEXT:    retq
+  %c = icmp ult i32 %a, %b
+  %d = icmp ugt i32 %a, %b
+  %z = zext i1 %d to i32
+  %res = select i1 %c, i32 -1, i32 %z
+  ret i32 %res
+}
+
+define i32 @unsigned_tree_way_cmp_i64(i64 %a, i64 %b) {
+; CHECK-LABEL: unsigned_tree_way_cmp_i64:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %ecx, %ecx
+; CHECK-NEXT:    cmpq %rsi, %rdi
+; CHECK-NEXT:    seta %cl
+; CHECK-NEXT:    movl $-1, %eax
+; CHECK-NEXT:    cmovael %ecx, %eax
+; CHECK-NEXT:    retq
+  %c = icmp ult i64 %a, %b
+  %d = icmp ugt i64 %a, %b
+  %z = zext i1 %d to i32
+  %res = select i1 %c, i32 -1, i32 %z
+  ret i32 %res
+}
+
+define i32 @signed_tree_way_cmp(i32 %a, i32 %b) {
+; CHECK-LABEL: signed_tree_way_cmp:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %ecx, %ecx
+; CHECK-NEXT:    cmpl %esi, %edi
+; CHECK-NEXT:    setg %cl
+; CHECK-NEXT:    movl $-1, %eax
+; CHECK-NEXT:    cmovgel %ecx, %eax
+; CHECK-NEXT:    retq
+  %c = icmp slt i32 %a, %b
+  %d = icmp sgt i32 %a, %b
+  %z = zext i1 %d to i32
+  %res = select i1 %c, i32 -1, i32 %z
+  ret i32 %res
+}
+
+define i32 @signed_tree_way_cmp_i64(i64 %a, i64 %b) {
+; CHECK-LABEL: signed_tree_way_cmp_i64:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %ecx, %ecx
+; CHECK-NEXT:    cmpq %rsi, %rdi
+; CHECK-NEXT:    setg %cl
+; CHECK-NEXT:    movl $-1, %eax
+; CHECK-NEXT:    cmovgel %ecx, %eax
+; CHECK-NEXT:    retq
+  %c = icmp slt i64 %a, %b
+  %d = icmp sgt i64 %a, %b
+  %z = zext i1 %d to i32
+  %res = select i1 %c, i32 -1, i32 %z
+  ret i32 %res
+}




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