[PATCH] D63055: [X86] NFCI : Comment updation for EVEX to VEX translation.
Jatin Bhateja via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Jun 9 02:52:31 PDT 2019
jbhateja updated this revision to Diff 203728.
jbhateja added a comment.
- Updating comment
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D63055/new/
https://reviews.llvm.org/D63055
Files:
lib/Target/X86/X86EvexToVex.cpp
Index: lib/Target/X86/X86EvexToVex.cpp
===================================================================
--- lib/Target/X86/X86EvexToVex.cpp
+++ lib/Target/X86/X86EvexToVex.cpp
@@ -12,9 +12,9 @@
/// are encoded using the EVEX prefix and if possible replaces them by their
/// corresponding VEX encoding which is usually shorter by 2 bytes.
/// EVEX instructions may be encoded via the VEX prefix when the AVX-512
-/// instruction has a corresponding AVX/AVX2 opcode and when it does not
-/// use the xmm or the mask registers or xmm/ymm registers with indexes
-/// higher than 15.
+/// instruction has a corresponding AVX/AVX2 opcode, when vector length
+/// accessed by instruction is less than 512 bits and when it does not use
+// the xmm or the mask registers or xmm/ymm registers with indexes higher than 15.
/// The pass applies code reduction on the generated code for AVX-512 instrs.
//
//===----------------------------------------------------------------------===//
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