[PATCH] D63025: [InstCombine] Add tests to show fold order is wrong for icmp pred (and (sh X, Y), C), 0.

[Huihui Zhang via Phabricator via llvm-commits]

huihuiz created this revision.
huihuiz added reviewers: lebedev.ri, efriedma, spatel, craig.topper.
Herald added a project: LLVM.

When C is signbit, expect to fold (X << Y) & signbit ==/!= 0 into (X << Y) >=/< 0,
rather than (X & (signbit >> Y)) != 0.

When C+1 is power of 2, expect to fold (X << Y) & ~C ==/!= 0 into (X << Y) </>= C+1,
rather than (X & (~C >> Y)) == 0.


Repository:
  rL LLVM

https://reviews.llvm.org/D63025

Files:
  test/Transforms/InstCombine/icmp-shift-and-negC.ll
  test/Transforms/InstCombine/icmp-shift-and-signbit.ll


Index: test/Transforms/InstCombine/icmp-shift-and-signbit.ll
===================================================================
--- /dev/null
+++ test/Transforms/InstCombine/icmp-shift-and-signbit.ll
@@ -0,0 +1,30 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt %s -instcombine -S | FileCheck %s
+
+; FIXME: expect ((X << Y) & signbit) ==/!= 0 -> (X << Y) >=/< 0
+define i1 @shl-and-signbit(i32 %x, i32 %y) {
+; CHECK-LABEL: @shl-and-signbit(
+; CHECK-NEXT:    [[TMP1:%.*]] = lshr i32 -2147483648, [[Y:%.*]]
+; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[TMP1]], [[X:%.*]]
+; CHECK-NEXT:    [[R:%.*]] = icmp ne i32 [[TMP2]], 0
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %shl = shl i32 %x, %y
+  %and = and i32 %shl, -2147483648
+  %r = icmp ne i32 %and, 0
+  ret i1 %r
+}
+
+; FIXME: expect ((X l>> Y) & signbit) ==/!= 0 -> (X l>> Y) >=/< 0
+define i1 @lshr-and-signbit(i32 %x, i32 %y) {
+; CHECK-LABEL: @lshr-and-signbit(
+; CHECK-NEXT:    [[TMP1:%.*]] = shl i32 -2147483648, [[Y:%.*]]
+; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[TMP1]], [[X:%.*]]
+; CHECK-NEXT:    [[R:%.*]] = icmp eq i32 [[TMP2]], 0
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %lshr = lshr i32 %x, %y
+  %and = and i32 %lshr, -2147483648
+  %r = icmp eq i32 %and, 0
+  ret i1 %r
+}
Index: test/Transforms/InstCombine/icmp-shift-and-negC.ll
===================================================================
--- /dev/null
+++ test/Transforms/InstCombine/icmp-shift-and-negC.ll
@@ -0,0 +1,31 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt %s -instcombine -S | FileCheck %s
+
+
+; FIXME: expect ((X << Y) & ~C) ==/!= 0 -> (X << Y) </>= C+1; C+1 is power of 2
+define i1 @shl-and-negC(i32 %x, i32 %y) {
+; CHECK-LABEL: @shl-and-negC(
+; CHECK-NEXT:    [[TMP1:%.*]] = lshr i32 -8, [[Y:%.*]]
+; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[TMP1]], [[X:%.*]]
+; CHECK-NEXT:    [[R:%.*]] = icmp ne i32 [[TMP2]], 0
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %shl = shl i32 %x, %y
+  %and = and i32 %shl, 4294967288  ; ~7
+  %r = icmp ne i32 %and, 0
+  ret i1 %r
+}
+
+; FIXME: expect ((X l>> Y) & ~C) ==/!= 0 -> (X l>> Y) </>= C+1; C+1 is power of 2
+define i1 @lshr-and-negC(i32 %x, i32 %y) {
+; CHECK-LABEL: @lshr-and-negC(
+; CHECK-NEXT:    [[TMP1:%.*]] = shl i32 -8, [[Y:%.*]]
+; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[TMP1]], [[X:%.*]]
+; CHECK-NEXT:    [[R:%.*]] = icmp eq i32 [[TMP2]], 0
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %lshr = lshr i32 %x, %y
+  %and = and i32 %lshr, 4294967288  ; ~7
+  %r = icmp eq i32 %and, 0
+  ret i1 %r
+}


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