[llvm] r362687 - [SCEV] Use wrap flags in InsertBinop
Sam Parker via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 6 01:56:26 PDT 2019
Author: sam_parker
Date: Thu Jun 6 01:56:26 2019
New Revision: 362687
URL: http://llvm.org/viewvc/llvm-project?rev=362687&view=rev
Log:
[SCEV] Use wrap flags in InsertBinop
If the given SCEVExpr has no (un)signed flags attached to it, transfer
these to the resulting instruction or use them to find an existing
instruction.
Differential Revision: https://reviews.llvm.org/D61934
Modified:
llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h
llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp
llvm/trunk/test/CodeGen/Hexagon/loop-idiom/memmove-rt-check.ll
llvm/trunk/test/Transforms/IRCE/bad_expander.ll
llvm/trunk/test/Transforms/IRCE/conjunctive-checks.ll
llvm/trunk/test/Transforms/IRCE/decrementing-loop.ll
llvm/trunk/test/Transforms/IRCE/ranges_of_different_types.ll
llvm/trunk/test/Transforms/IRCE/rc-negative-bound.ll
llvm/trunk/test/Transforms/IRCE/single-access-no-preloop.ll
llvm/trunk/test/Transforms/IRCE/single-access-with-preloop.ll
llvm/trunk/test/Transforms/IRCE/stride_more_than_1.ll
llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ugt.ll
llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ult.ll
llvm/trunk/test/Transforms/IndVarSimplify/lftr.ll
llvm/trunk/test/Transforms/IndVarSimplify/loop_evaluate_1.ll
llvm/trunk/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll
llvm/trunk/test/Transforms/LoopIdiom/basic.ll
llvm/trunk/test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll
llvm/trunk/test/Transforms/LoopReroll/basic.ll
llvm/trunk/test/Transforms/LoopReroll/complex_reroll.ll
llvm/trunk/test/Transforms/LoopReroll/nonconst_lb.ll
llvm/trunk/test/Transforms/LoopReroll/ptrindvar.ll
llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll
llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-expand-quadratic.ll
llvm/trunk/test/Transforms/LoopStrengthReduce/X86/nested-loop.ll
llvm/trunk/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
llvm/trunk/test/Transforms/LoopVectorize/AArch64/pr36032.ll
llvm/trunk/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll
Modified: llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h (original)
+++ llvm/trunk/include/llvm/Analysis/ScalarEvolutionExpander.h Thu Jun 6 01:56:26 2019
@@ -318,7 +318,7 @@ namespace llvm {
/// avoid inserting an obviously redundant operation, and hoisting to an
/// outer loop when the opportunity is there and it is safe.
Value *InsertBinop(Instruction::BinaryOps Opcode, Value *LHS, Value *RHS,
- bool IsSafeToHoist);
+ SCEV::NoWrapFlags Flags, bool IsSafeToHoist);
/// Arrange for there to be a cast of V to Ty at IP, reusing an existing
/// cast if a suitable one exists, moving an existing cast if a suitable one
Modified: llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp (original)
+++ llvm/trunk/lib/Analysis/ScalarEvolutionExpander.cpp Thu Jun 6 01:56:26 2019
@@ -169,7 +169,8 @@ Value *SCEVExpander::InsertNoopCastOfTo(
/// of work to avoid inserting an obviously redundant operation, and hoisting
/// to an outer loop when the opportunity is there and it is safe.
Value *SCEVExpander::InsertBinop(Instruction::BinaryOps Opcode,
- Value *LHS, Value *RHS, bool IsSafeToHoist) {
+ Value *LHS, Value *RHS,
+ SCEV::NoWrapFlags Flags, bool IsSafeToHoist) {
// Fold a binop with constant operands.
if (Constant *CLHS = dyn_cast<Constant>(LHS))
if (Constant *CRHS = dyn_cast<Constant>(RHS))
@@ -188,20 +189,22 @@ Value *SCEVExpander::InsertBinop(Instruc
if (isa<DbgInfoIntrinsic>(IP))
ScanLimit++;
- // Conservatively, do not use any instruction which has any of wrap/exact
- // flags installed.
- // TODO: Instead of simply disable poison instructions we can be clever
- // here and match SCEV to this instruction.
- auto canGeneratePoison = [](Instruction *I) {
- if (isa<OverflowingBinaryOperator>(I) &&
- (I->hasNoSignedWrap() || I->hasNoUnsignedWrap()))
- return true;
+ auto canGenerateIncompatiblePoison = [&Flags](Instruction *I) {
+ // Ensure that no-wrap flags match.
+ if (isa<OverflowingBinaryOperator>(I)) {
+ if (I->hasNoSignedWrap() != (Flags & SCEV::FlagNSW))
+ return true;
+ if (I->hasNoUnsignedWrap() != (Flags & SCEV::FlagNUW))
+ return true;
+ }
+ // Conservatively, do not use any instruction which has any of exact
+ // flags installed.
if (isa<PossiblyExactOperator>(I) && I->isExact())
return true;
return false;
};
if (IP->getOpcode() == (unsigned)Opcode && IP->getOperand(0) == LHS &&
- IP->getOperand(1) == RHS && !canGeneratePoison(&*IP))
+ IP->getOperand(1) == RHS && !canGenerateIncompatiblePoison(&*IP))
return &*IP;
if (IP == BlockBegin) break;
}
@@ -226,6 +229,10 @@ Value *SCEVExpander::InsertBinop(Instruc
// If we haven't found this binop, insert it.
Instruction *BO = cast<Instruction>(Builder.CreateBinOp(Opcode, LHS, RHS));
BO->setDebugLoc(Loc);
+ if (Flags & SCEV::FlagNUW)
+ BO->setHasNoUnsignedWrap();
+ if (Flags & SCEV::FlagNSW)
+ BO->setHasNoSignedWrap();
rememberInstruction(BO);
return BO;
@@ -737,7 +744,8 @@ Value *SCEVExpander::visitAddExpr(const
// Instead of doing a negate and add, just do a subtract.
Value *W = expandCodeFor(SE.getNegativeSCEV(Op), Ty);
Sum = InsertNoopCastOfTo(Sum, Ty);
- Sum = InsertBinop(Instruction::Sub, Sum, W, /*IsSafeToHoist*/ true);
+ Sum = InsertBinop(Instruction::Sub, Sum, W, S->getNoWrapFlags(),
+ /*IsSafeToHoist*/ true);
++I;
} else {
// A simple add.
@@ -745,7 +753,8 @@ Value *SCEVExpander::visitAddExpr(const
Sum = InsertNoopCastOfTo(Sum, Ty);
// Canonicalize a constant to the RHS.
if (isa<Constant>(Sum)) std::swap(Sum, W);
- Sum = InsertBinop(Instruction::Add, Sum, W, /*IsSafeToHoist*/ true);
+ Sum = InsertBinop(Instruction::Add, Sum, W, S->getNoWrapFlags(),
+ /*IsSafeToHoist*/ true);
++I;
}
}
@@ -774,7 +783,7 @@ Value *SCEVExpander::visitMulExpr(const
// Expand the calculation of X pow N in the following manner:
// Let N = P1 + P2 + ... + PK, where all P are powers of 2. Then:
// X pow N = (X pow P1) * (X pow P2) * ... * (X pow PK).
- const auto ExpandOpBinPowN = [this, &I, &OpsAndLoops, &Ty]() {
+ const auto ExpandOpBinPowN = [this, &I, &OpsAndLoops, &Ty, &S]() {
auto E = I;
// Calculate how many times the same operand from the same loop is included
// into this power.
@@ -797,9 +806,11 @@ Value *SCEVExpander::visitMulExpr(const
if (Exponent & 1)
Result = P;
for (uint64_t BinExp = 2; BinExp <= Exponent; BinExp <<= 1) {
- P = InsertBinop(Instruction::Mul, P, P, /*IsSafeToHoist*/ true);
+ P = InsertBinop(Instruction::Mul, P, P, S->getNoWrapFlags(),
+ /*IsSafeToHoist*/ true);
if (Exponent & BinExp)
Result = Result ? InsertBinop(Instruction::Mul, Result, P,
+ S->getNoWrapFlags(),
/*IsSafeToHoist*/ true)
: P;
}
@@ -817,6 +828,7 @@ Value *SCEVExpander::visitMulExpr(const
// Instead of doing a multiply by negative one, just do a negate.
Prod = InsertNoopCastOfTo(Prod, Ty);
Prod = InsertBinop(Instruction::Sub, Constant::getNullValue(Ty), Prod,
+ S->getNoWrapFlags(),
/*IsSafeToHoist*/ true);
++I;
} else {
@@ -831,9 +843,10 @@ Value *SCEVExpander::visitMulExpr(const
assert(!Ty->isVectorTy() && "vector types are not SCEVable");
Prod = InsertBinop(Instruction::Shl, Prod,
ConstantInt::get(Ty, RHS->logBase2()),
- /*IsSafeToHoist*/ true);
+ S->getNoWrapFlags(), /*IsSafeToHoist*/ true);
} else {
- Prod = InsertBinop(Instruction::Mul, Prod, W, /*IsSafeToHoist*/ true);
+ Prod = InsertBinop(Instruction::Mul, Prod, W, S->getNoWrapFlags(),
+ /*IsSafeToHoist*/ true);
}
}
}
@@ -850,11 +863,11 @@ Value *SCEVExpander::visitUDivExpr(const
if (RHS.isPowerOf2())
return InsertBinop(Instruction::LShr, LHS,
ConstantInt::get(Ty, RHS.logBase2()),
- /*IsSafeToHoist*/ true);
+ SCEV::FlagAnyWrap, /*IsSafeToHoist*/ true);
}
Value *RHS = expandCodeFor(S->getRHS(), Ty);
- return InsertBinop(Instruction::UDiv, LHS, RHS,
+ return InsertBinop(Instruction::UDiv, LHS, RHS, SCEV::FlagAnyWrap,
/*IsSafeToHoist*/ SE.isKnownNonZero(S->getRHS()));
}
Modified: llvm/trunk/test/CodeGen/Hexagon/loop-idiom/memmove-rt-check.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/loop-idiom/memmove-rt-check.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/loop-idiom/memmove-rt-check.ll (original)
+++ llvm/trunk/test/CodeGen/Hexagon/loop-idiom/memmove-rt-check.ll Thu Jun 6 01:56:26 2019
@@ -3,7 +3,7 @@
; Make sure that we generate correct runtime checks.
; CHECK: b7.old:
-; CHECK: [[LEN:%[0-9]+]] = shl i32 %len, 3
+; CHECK: [[LEN:%[0-9]+]] = shl nuw i32 %len, 3
; CHECK: [[SRC:%[0-9]+]] = ptrtoint i8* %src to i32
; CHECK: [[DST:%[0-9]+]] = ptrtoint i8* %dst to i32
; CHECK: [[ULT:%[0-9]+]] = icmp ult i32 [[DST]], [[SRC]]
Modified: llvm/trunk/test/Transforms/IRCE/bad_expander.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/bad_expander.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/IRCE/bad_expander.ll (original)
+++ llvm/trunk/test/Transforms/IRCE/bad_expander.ll Thu Jun 6 01:56:26 2019
@@ -89,7 +89,7 @@ define void @test_03(i64* %p1, i64* %p2,
; CHECK: entry:
; CHECK-NEXT: %num = load i64, i64* %p1, align 4
; CHECK-NEXT: [[DIV:%[^ ]+]] = udiv i64 %num, 13
-; CHECK-NEXT: [[DIV_MINUS_1:%[^ ]+]] = add i64 [[DIV]], -1
+; CHECK-NEXT: [[DIV_MINUS_1:%[^ ]+]] = add nsw i64 [[DIV]], -1
; CHECK-NEXT: [[COMP1:%[^ ]+]] = icmp sgt i64 [[DIV_MINUS_1]], 0
; CHECK-NEXT: %exit.mainloop.at = select i1 [[COMP1]], i64 [[DIV_MINUS_1]], i64 0
; CHECK-NEXT: [[COMP2:%[^ ]+]] = icmp slt i64 0, %exit.mainloop.at
Modified: llvm/trunk/test/Transforms/IRCE/conjunctive-checks.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/conjunctive-checks.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/IRCE/conjunctive-checks.ll (original)
+++ llvm/trunk/test/Transforms/IRCE/conjunctive-checks.ll Thu Jun 6 01:56:26 2019
@@ -5,7 +5,7 @@ define void @f_0(i32 *%arr, i32 *%a_len_
; CHECK-LABEL: @f_0(
; CHECK: loop.preheader:
-; CHECK: [[len_sub:[^ ]+]] = add i32 %len, -4
+; CHECK: [[len_sub:[^ ]+]] = add nsw i32 %len, -4
; CHECK: [[exit_main_loop_at_hiclamp_cmp:[^ ]+]] = icmp slt i32 %n, [[len_sub]]
; CHECK: [[exit_main_loop_at_hiclamp:[^ ]+]] = select i1 [[exit_main_loop_at_hiclamp_cmp]], i32 %n, i32 [[len_sub]]
; CHECK: [[exit_main_loop_at_loclamp_cmp:[^ ]+]] = icmp sgt i32 [[exit_main_loop_at_hiclamp]], 0
Modified: llvm/trunk/test/Transforms/IRCE/decrementing-loop.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/decrementing-loop.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/IRCE/decrementing-loop.ll (original)
+++ llvm/trunk/test/Transforms/IRCE/decrementing-loop.ll Thu Jun 6 01:56:26 2019
@@ -33,7 +33,7 @@ define void @decrementing_loop(i32 *%arr
; CHECK: [[len_hiclamp:[^ ]+]] = select i1 [[len_hiclamp_cmp]], i32 %len, i32 %n
; CHECK: [[not_exit_preloop_at_cmp:[^ ]+]] = icmp sgt i32 [[len_hiclamp]], 0
; CHECK: [[not_exit_preloop_at:[^ ]+]] = select i1 [[not_exit_preloop_at_cmp]], i32 [[len_hiclamp]], i32 0
-; CHECK: %exit.preloop.at = add i32 [[not_exit_preloop_at]], -1
+; CHECK: %exit.preloop.at = add nsw i32 [[not_exit_preloop_at]], -1
}
; Make sure that we can eliminate the range check when the loop looks like:
Modified: llvm/trunk/test/Transforms/IRCE/ranges_of_different_types.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/ranges_of_different_types.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/IRCE/ranges_of_different_types.ll (original)
+++ llvm/trunk/test/Transforms/IRCE/ranges_of_different_types.ll Thu Jun 6 01:56:26 2019
@@ -23,7 +23,7 @@ define void @test_01(i32* %arr, i32* %a_
; CHECK-NOT: preloop
; CHECK: entry:
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0
-; CHECK-NEXT: [[SUB1:%[^ ]+]] = add i32 %len, -13
+; CHECK-NEXT: [[SUB1:%[^ ]+]] = add nsw i32 %len, -13
; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp slt i32 [[SUB1]], 101
; CHECK-NEXT: [[SMAX:%[^ ]+]] = select i1 [[CMP1]], i32 [[SUB1]], i32 101
; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp sgt i32 [[SMAX]], 0
@@ -79,10 +79,10 @@ define void @test_02(i32* %arr, i32* %a_
; CHECK-LABEL: test_02(
; CHECK: entry:
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0
-; CHECK-NEXT: [[LEN_MINUS_SMAX:%[^ ]+]] = add i32 %len, -2147483647
+; CHECK-NEXT: [[LEN_MINUS_SMAX:%[^ ]+]] = add nuw nsw i32 %len, -2147483647
; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp sgt i32 [[LEN_MINUS_SMAX]], -13
; CHECK-NEXT: [[SMAX1:%[^ ]+]] = select i1 [[CMP1]], i32 [[LEN_MINUS_SMAX]], i32 -13
-; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub i32 %len, [[SMAX1]]
+; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub nuw nsw i32 %len, [[SMAX1]]
; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp slt i32 [[SUB1]], 101
; CHECK-NEXT: [[SMAX2:%[^ ]+]] = select i1 [[CMP2]], i32 [[SUB1]], i32 101
; CHECK-NEXT: [[CMP3:%[^ ]+]] = icmp sgt i32 [[SMAX2]], 0
@@ -202,7 +202,7 @@ define void @test_04(i32* %arr, i32* %a_
; CHECK-LABEL: test_04(
; CHECK: entry:
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0
-; CHECK-NEXT: [[SUB1:%[^ ]+]] = add i32 %len, 13
+; CHECK-NEXT: [[SUB1:%[^ ]+]] = add nuw i32 %len, 13
; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp ult i32 [[SUB1]], 101
; CHECK-NEXT: %exit.mainloop.at = select i1 [[CMP1]], i32 [[SUB1]], i32 101
; CHECK-NEXT: br i1 true, label %loop.preloop.preheader
@@ -245,7 +245,7 @@ define void @test_05(i32* %arr, i32* %a_
; CHECK-NOT: preloop
; CHECK: entry:
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0
-; CHECK-NEXT: [[SUB1:%[^ ]+]] = add i32 %len, -13
+; CHECK-NEXT: [[SUB1:%[^ ]+]] = add nsw i32 %len, -13
; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp slt i32 [[SUB1]], 101
; CHECK-NEXT: [[SMAX:%[^ ]+]] = select i1 [[CMP1]], i32 [[SUB1]], i32 101
; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp sgt i32 [[SMAX]], 0
@@ -286,10 +286,10 @@ define void @test_06(i32* %arr, i32* %a_
; CHECK-LABEL: test_06(
; CHECK: entry:
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0
-; CHECK-NEXT: [[LEN_MINUS_SMAX:%[^ ]+]] = add i32 %len, -2147483647
+; CHECK-NEXT: [[LEN_MINUS_SMAX:%[^ ]+]] = add nuw nsw i32 %len, -2147483647
; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp sgt i32 [[LEN_MINUS_SMAX]], -13
; CHECK-NEXT: [[SMAX1:%[^ ]+]] = select i1 [[CMP1]], i32 [[LEN_MINUS_SMAX]], i32 -13
-; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub i32 %len, [[SMAX1]]
+; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub nuw nsw i32 %len, [[SMAX1]]
; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp slt i32 [[SUB1]], 101
; CHECK-NEXT: [[SMAX2:%[^ ]+]] = select i1 [[CMP2]], i32 [[SUB1]], i32 101
; CHECK-NEXT: [[CMP3:%[^ ]+]] = icmp sgt i32 [[SMAX2]], 0
@@ -375,7 +375,7 @@ define void @test_08(i32* %arr, i32* %a_
; CHECK-LABEL: test_08(
; CHECK: entry:
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0
-; CHECK-NEXT: [[SUB1:%[^ ]+]] = add i32 %len, 13
+; CHECK-NEXT: [[SUB1:%[^ ]+]] = add nuw i32 %len, 13
; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp ult i32 [[SUB1]], 101
; CHECK-NEXT: %exit.mainloop.at = select i1 [[CMP1]], i32 [[SUB1]], i32 101
; CHECK-NEXT: br i1 true, label %loop.preloop.preheader
Modified: llvm/trunk/test/Transforms/IRCE/rc-negative-bound.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/rc-negative-bound.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/IRCE/rc-negative-bound.ll (original)
+++ llvm/trunk/test/Transforms/IRCE/rc-negative-bound.ll Thu Jun 6 01:56:26 2019
@@ -115,7 +115,7 @@ define void @test_03(i32 *%arr, i32 %n,
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[BOUND:%.*]], -2147483647
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[TMP0]], 0
; CHECK-NEXT: [[SMIN:%.*]] = select i1 [[TMP1]], i32 [[TMP0]], i32 0
-; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[BOUND]], [[SMIN]]
+; CHECK-NEXT: [[TMP2:%.*]] = sub nsw i32 [[BOUND]], [[SMIN]]
; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[BOUND]], 0
; CHECK-NEXT: [[SMAX:%.*]] = select i1 [[TMP3]], i32 [[BOUND]], i32 0
; CHECK-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[SMAX]], -1
@@ -403,7 +403,7 @@ define void @test_07(i32 *%arr, i32 %n,
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[BOUND:%.*]], -2147483647
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[TMP0]], 0
; CHECK-NEXT: [[SMIN:%.*]] = select i1 [[TMP1]], i32 [[TMP0]], i32 0
-; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[BOUND]], [[SMIN]]
+; CHECK-NEXT: [[TMP2:%.*]] = sub nsw i32 [[BOUND]], [[SMIN]]
; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[BOUND]], 0
; CHECK-NEXT: [[SMAX:%.*]] = select i1 [[TMP3]], i32 [[BOUND]], i32 0
; CHECK-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[SMAX]], -1
Modified: llvm/trunk/test/Transforms/IRCE/single-access-no-preloop.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/single-access-no-preloop.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/IRCE/single-access-no-preloop.ll (original)
+++ llvm/trunk/test/Transforms/IRCE/single-access-no-preloop.ll Thu Jun 6 01:56:26 2019
@@ -86,7 +86,7 @@ define void @single_access_no_preloop_wi
; CHECK-LABEL: @single_access_no_preloop_with_offset(
; CHECK: loop.preheader:
-; CHECK: [[safe_range_end:[^ ]+]] = add i32 %len, -4
+; CHECK: [[safe_range_end:[^ ]+]] = add nsw i32 %len, -4
; CHECK: [[exit_main_loop_at_hiclamp_cmp:[^ ]+]] = icmp slt i32 %n, [[safe_range_end]]
; CHECK: [[exit_main_loop_at_hiclamp:[^ ]+]] = select i1 [[exit_main_loop_at_hiclamp_cmp]], i32 %n, i32 [[safe_range_end]]
; CHECK: [[exit_main_loop_at_loclamp_cmp:[^ ]+]] = icmp sgt i32 [[exit_main_loop_at_hiclamp]], 0
Modified: llvm/trunk/test/Transforms/IRCE/single-access-with-preloop.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/single-access-with-preloop.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/IRCE/single-access-with-preloop.ll (original)
+++ llvm/trunk/test/Transforms/IRCE/single-access-with-preloop.ll Thu Jun 6 01:56:26 2019
@@ -34,23 +34,23 @@ define void @single_access_with_preloop(
; CHECK: [[check_min_sint_offset:[^ ]+]] = icmp sgt i32 %offset, -2147483647
; CHECK: [[safe_offset_preloop:[^ ]+]] = select i1 [[check_min_sint_offset]], i32 %offset, i32 -2147483647
; If Offset was a SINT_MIN, we could have an overflow here. That is why we calculated its safe version.
-; CHECK: [[safe_start:[^ ]+]] = sub i32 0, [[safe_offset_preloop]]
+; CHECK: [[safe_start:[^ ]+]] = sub nsw i32 0, [[safe_offset_preloop]]
; CHECK: [[exit_preloop_at_cond_loclamp:[^ ]+]] = icmp slt i32 %n, [[safe_start]]
; CHECK: [[exit_preloop_at_loclamp:[^ ]+]] = select i1 [[exit_preloop_at_cond_loclamp]], i32 %n, i32 [[safe_start]]
; CHECK: [[exit_preloop_at_cond:[^ ]+]] = icmp sgt i32 [[exit_preloop_at_loclamp]], 0
; CHECK: [[exit_preloop_at:[^ ]+]] = select i1 [[exit_preloop_at_cond]], i32 [[exit_preloop_at_loclamp]], i32 0
-; CHECK: [[len_minus_sint_max:[^ ]+]] = add i32 %len, -2147483647
+; CHECK: [[len_minus_sint_max:[^ ]+]] = add nuw nsw i32 %len, -2147483647
; CHECK: [[check_len_min_sint_offset:[^ ]+]] = icmp sgt i32 %offset, [[len_minus_sint_max]]
; CHECK: [[safe_offset_mainloop:[^ ]+]] = select i1 [[check_len_min_sint_offset]], i32 %offset, i32 [[len_minus_sint_max]]
; If Offset was a SINT_MIN, we could have an overflow here. That is why we calculated its safe version.
-; CHECK: [[safe_upper_end:[^ ]+]] = sub i32 %len, [[safe_offset_mainloop]]
+; CHECK: [[safe_upper_end:[^ ]+]] = sub nsw i32 %len, [[safe_offset_mainloop]]
; CHECK: [[exit_mainloop_at_cond_loclamp:[^ ]+]] = icmp slt i32 %n, [[safe_upper_end]]
; CHECK: [[exit_mainloop_at_loclamp:[^ ]+]] = select i1 [[exit_mainloop_at_cond_loclamp]], i32 %n, i32 [[safe_upper_end]]
; CHECK: [[check_offset_mainloop_2:[^ ]+]] = icmp sgt i32 %offset, 0
; CHECK: [[safe_offset_mainloop_2:[^ ]+]] = select i1 [[check_offset_mainloop_2]], i32 %offset, i32 0
-; CHECK: [[safe_lower_end:[^ ]+]] = sub i32 2147483647, [[safe_offset_mainloop_2]]
+; CHECK: [[safe_lower_end:[^ ]+]] = sub nsw i32 2147483647, [[safe_offset_mainloop_2]]
; CHECK: [[exit_mainloop_at_cond_hiclamp:[^ ]+]] = icmp slt i32 [[exit_mainloop_at_loclamp]], [[safe_lower_end]]
; CHECK: [[exit_mainloop_at_hiclamp:[^ ]+]] = select i1 [[exit_mainloop_at_cond_hiclamp]], i32 [[exit_mainloop_at_loclamp]], i32 [[safe_lower_end]]
; CHECK: [[exit_mainloop_at_cmp:[^ ]+]] = icmp sgt i32 [[exit_mainloop_at_hiclamp]], 0
Modified: llvm/trunk/test/Transforms/IRCE/stride_more_than_1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/stride_more_than_1.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/IRCE/stride_more_than_1.ll (original)
+++ llvm/trunk/test/Transforms/IRCE/stride_more_than_1.ll Thu Jun 6 01:56:26 2019
@@ -254,7 +254,7 @@ define void @test_05(i32* %arr, i32* %a_
; CHECK: @test_05(
; CHECK: entry:
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr
-; CHECK-NEXT: %exit.preloop.at = add i32 %len, -1
+; CHECK-NEXT: %exit.preloop.at = add nsw i32 %len, -1
; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp sgt i32 100, %exit.preloop.at
; CHECK-NEXT: br i1 [[COND1]], label %loop.preloop.preheader, label %preloop.pseudo.exit
; CHECK: loop.preloop.preheader:
@@ -320,7 +320,7 @@ define void @test_06(i32* %arr, i32* %a_
; CHECK: @test_06(
; CHECK: entry:
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr
-; CHECK-NEXT: %exit.preloop.at = add i32 %len, -1
+; CHECK-NEXT: %exit.preloop.at = add nsw i32 %len, -1
; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 2147483640, %exit.preloop.at
; CHECK-NEXT: br i1 [[COND1]], label %loop.preloop.preheader, label %preloop.pseudo.exit
; CHECK: loop.preloop.preheader:
@@ -415,7 +415,7 @@ define void @test_08(i32* %arr, i32* %a_
; CHECK: @test_08(
; CHECK: entry:
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr
-; CHECK-NEXT: %exit.preloop.at = add i32 %len, -1
+; CHECK-NEXT: %exit.preloop.at = add nsw i32 %len, -1
; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 2147483647, %exit.preloop.at
; CHECK-NEXT: br i1 [[COND1]], label %loop.preloop.preheader, label %preloop.pseudo.exit
; CHECK: loop.preloop.preheader:
Modified: llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ugt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ugt.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ugt.ll (original)
+++ llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ugt.ll Thu Jun 6 01:56:26 2019
@@ -59,7 +59,7 @@ define void @test_02(i32* %arr, i32* %a_
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0
; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 %len, 1
; CHECK-NEXT: [[UMIN:%[^ ]+]] = select i1 [[COND1]], i32 %len, i32 1
-; CHECK-NEXT: %exit.preloop.at = add i32 [[UMIN]], -1
+; CHECK-NEXT: %exit.preloop.at = add nsw i32 [[UMIN]], -1
; CHECK-NEXT: [[COND2:%[^ ]+]] = icmp ugt i32 100, %exit.preloop.at
; CHECK-NEXT: br i1 [[COND2]], label %loop.preloop.preheader, label %preloop.pseudo.exit
; CHECK: mainloop:
@@ -150,7 +150,7 @@ define void @test_04(i32* %arr, i32* %a_
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0
; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 %len, 1
; CHECK-NEXT: [[UMIN:%[^ ]+]] = select i1 [[COND1]], i32 %len, i32 1
-; CHECK-NEXT: %exit.preloop.at = add i32 [[UMIN]], -1
+; CHECK-NEXT: %exit.preloop.at = add nsw i32 [[UMIN]], -1
; CHECK-NEXT: [[COND2:%[^ ]+]] = icmp ugt i32 -2147483648, %exit.preloop.at
; CHECK-NEXT: br i1 [[COND2]], label %loop.preloop.preheader, label %preloop.pseudo.exit
; CHECK: mainloop:
Modified: llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ult.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ult.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ult.ll (original)
+++ llvm/trunk/test/Transforms/IRCE/unsigned_comparisons_ult.ll Thu Jun 6 01:56:26 2019
@@ -62,7 +62,7 @@ define void @test_02(i32* %arr, i32* %a_
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0
; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 %len, 1
; CHECK-NEXT: [[UMIN:%[^ ]+]] = select i1 [[COND1]], i32 %len, i32 1
-; CHECK-NEXT: %exit.preloop.at = add i32 [[UMIN]], -1
+; CHECK-NEXT: %exit.preloop.at = add nsw i32 [[UMIN]], -1
; CHECK-NEXT: [[COND2:%[^ ]+]] = icmp ugt i32 100, %exit.preloop.at
; CHECK-NEXT: br i1 [[COND2]], label %loop.preloop.preheader, label %preloop.pseudo.exit
; CHECK: mainloop:
@@ -195,7 +195,7 @@ define void @test_05(i32* %arr, i32* %a_
; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0
; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 %len, 1
; CHECK-NEXT: [[UMIN:%[^ ]+]] = select i1 [[COND1]], i32 %len, i32 1
-; CHECK-NEXT: %exit.preloop.at = add i32 [[UMIN]], -1
+; CHECK-NEXT: %exit.preloop.at = add nsw i32 [[UMIN]], -1
; CHECK-NEXT: [[COND2:%[^ ]+]] = icmp ugt i32 -2147483648, %exit.preloop.at
; CHECK-NEXT: br i1 [[COND2]], label %loop.preloop.preheader, label %preloop.pseudo.exit
; CHECK: mainloop:
Modified: llvm/trunk/test/Transforms/IndVarSimplify/lftr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IndVarSimplify/lftr.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/IndVarSimplify/lftr.ll (original)
+++ llvm/trunk/test/Transforms/IndVarSimplify/lftr.ll Thu Jun 6 01:56:26 2019
@@ -202,7 +202,7 @@ define void @test_udiv_as_shift(i8* %a,
; CHECK: loop.preheader:
; CHECK-NEXT: [[TMP0:%.*]] = add i8 [[N]], 3
; CHECK-NEXT: [[TMP1:%.*]] = lshr i8 [[TMP0]], 2
-; CHECK-NEXT: [[TMP2:%.*]] = add i8 [[TMP1]], 1
+; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw i8 [[TMP1]], 1
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[I1:%.*]] = phi i8 [ [[I1_INC:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
Modified: llvm/trunk/test/Transforms/IndVarSimplify/loop_evaluate_1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/IndVarSimplify/loop_evaluate_1.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/IndVarSimplify/loop_evaluate_1.ll (original)
+++ llvm/trunk/test/Transforms/IndVarSimplify/loop_evaluate_1.ll Thu Jun 6 01:56:26 2019
@@ -25,7 +25,7 @@ loopexit: ; preds = %loope
; CHECK-LABEL: @test2
; CHECK: [[VAR1:%.+]] = add i32 %arg, -11
; CHECK: [[VAR2:%.+]] = lshr i32 [[VAR1]], 1
-; CHECK: [[VAR3:%.+]] = add i32 [[VAR2]], 1
+; CHECK: [[VAR3:%.+]] = add nuw i32 [[VAR2]], 1
; CHECK: [[VAR4:%.+]] = phi i32 [ 0, %bb ], [ [[VAR3]], %bb1.preheader ]
; CHECK: ret i32 [[VAR4]]
define i32 @test2(i32 %arg) {
Modified: llvm/trunk/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll (original)
+++ llvm/trunk/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll Thu Jun 6 01:56:26 2019
@@ -282,7 +282,7 @@ for.end:
;; memcpy.atomic formation (atomic load & store) -- element size 2
define void @test6(i64 %Size) nounwind ssp {
; CHECK-LABEL: @test6(
-; CHECK: [[Sz:%[0-9]+]] = shl i64 %Size, 1
+; CHECK: [[Sz:%[0-9]+]] = shl nuw i64 %Size, 1
; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 2 %Dest{{[0-9]*}}, i8* align 2 %Base{{[0-9]*}}, i64 [[Sz]], i32 2)
; CHECK-NOT: store
; CHECK: ret void
@@ -308,7 +308,7 @@ for.end:
;; memcpy.atomic formation (atomic load & store) -- element size 4
define void @test7(i64 %Size) nounwind ssp {
; CHECK-LABEL: @test7(
-; CHECK: [[Sz:%[0-9]+]] = shl i64 %Size, 2
+; CHECK: [[Sz:%[0-9]+]] = shl nuw i64 %Size, 2
; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 4 %Dest{{[0-9]*}}, i8* align 4 %Base{{[0-9]*}}, i64 [[Sz]], i32 4)
; CHECK-NOT: store
; CHECK: ret void
@@ -334,7 +334,7 @@ for.end:
;; memcpy.atomic formation (atomic load & store) -- element size 8
define void @test8(i64 %Size) nounwind ssp {
; CHECK-LABEL: @test8(
-; CHECK: [[Sz:%[0-9]+]] = shl i64 %Size, 3
+; CHECK: [[Sz:%[0-9]+]] = shl nuw i64 %Size, 3
; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 8 %Dest{{[0-9]*}}, i8* align 8 %Base{{[0-9]*}}, i64 [[Sz]], i32 8)
; CHECK-NOT: store
; CHECK: ret void
@@ -360,7 +360,7 @@ for.end:
;; memcpy.atomic formation rejection (atomic load & store) -- element size 16
define void @test9(i64 %Size) nounwind ssp {
; CHECK-LABEL: @test9(
-; CHECK: [[Sz:%[0-9]+]] = shl i64 %Size, 4
+; CHECK: [[Sz:%[0-9]+]] = shl nuw i64 %Size, 4
; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 16 %Dest{{[0-9]*}}, i8* align 16 %Base{{[0-9]*}}, i64 [[Sz]], i32 16)
; CHECK-NOT: store
; CHECK: ret void
Modified: llvm/trunk/test/Transforms/LoopIdiom/basic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopIdiom/basic.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/LoopIdiom/basic.ll (original)
+++ llvm/trunk/test/Transforms/LoopIdiom/basic.ll Thu Jun 6 01:56:26 2019
@@ -46,7 +46,7 @@ for.end:
ret void
; CHECK-LABEL: @test1_i16(
; CHECK: %[[BaseBC:.*]] = bitcast i16* %Base to i8*
-; CHECK: %[[Sz:[0-9]+]] = shl i64 %Size, 1
+; CHECK: %[[Sz:[0-9]+]] = shl nuw i64 %Size, 1
; CHECK: call void @llvm.memset.p0i8.i64(i8* align 2 %[[BaseBC]], i8 0, i64 %[[Sz]], i1 false)
; CHECK-NOT: store
}
@@ -92,7 +92,7 @@ for.end:
ret void
; CHECK-LABEL: @test2(
; CHECK: br i1 %cmp10,
-; CHECK: %0 = shl i64 %Size, 2
+; CHECK: %0 = shl nuw i64 %Size, 2
; CHECK: call void @llvm.memset.p0i8.i64(i8* align 4 %Base1, i8 1, i64 %0, i1 false)
; CHECK-NOT: store
}
@@ -212,7 +212,7 @@ for.end:
; CHECK-LABEL: @test6_dest_align(
; CHECK: %[[Dst:.*]] = bitcast i32* %Dest to i8*
; CHECK: %[[Src:.*]] = bitcast i32* %Base to i8*
-; CHECK: %[[Sz:[0-9]+]] = shl i64 %Size, 2
+; CHECK: %[[Sz:[0-9]+]] = shl nuw i64 %Size, 2
; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %[[Dst]], i8* align 1 %[[Src]], i64 %[[Sz]], i1 false)
; CHECK-NOT: store
; CHECK: ret void
@@ -238,7 +238,7 @@ for.end:
; CHECK-LABEL: @test6_src_align(
; CHECK: %[[Dst]] = bitcast i32* %Dest to i8*
; CHECK: %[[Src]] = bitcast i32* %Base to i8*
-; CHECK: %[[Sz:[0-9]+]] = shl i64 %Size, 2
+; CHECK: %[[Sz:[0-9]+]] = shl nuw i64 %Size, 2
; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 %[[Dst]], i8* align 4 %[[Src]], i64 %[[Sz]], i1 false)
; CHECK-NOT: store
; CHECK: ret void
@@ -653,7 +653,7 @@ loop.ph:
br label %loop.body
; CHECK: loop.ph:
; CHECK-NEXT: %[[ZEXT_SIZE:.*]] = zext i32 %size to i64
-; CHECK-NEXT: %[[SCALED_SIZE:.*]] = shl i64 %[[ZEXT_SIZE]], 3
+; CHECK-NEXT: %[[SCALED_SIZE:.*]] = shl nuw nsw i64 %[[ZEXT_SIZE]], 3
; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 %{{.*}}, i8 0, i64 %[[SCALED_SIZE]], i1 false)
loop.body:
@@ -685,7 +685,7 @@ loop.ph:
br label %loop.body
; CHECK: loop.ph:
; CHECK-NEXT: %[[ZEXT_SIZE:.*]] = zext i32 %size to i64
-; CHECK-NEXT: %[[SCALED_SIZE:.*]] = shl i64 %[[ZEXT_SIZE]], 3
+; CHECK-NEXT: %[[SCALED_SIZE:.*]] = shl nuw nsw i64 %[[ZEXT_SIZE]], 3
; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %{{.*}}, i8* align 8 %{{.*}}, i64 %[[SCALED_SIZE]], i1 false)
loop.body:
Modified: llvm/trunk/test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll (original)
+++ llvm/trunk/test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll Thu Jun 6 01:56:26 2019
@@ -13,7 +13,7 @@ define void @test6_dest_align(i32* noali
; CHECK-NEXT: bb.nph:
; CHECK-NEXT: [[DEST1:%.*]] = bitcast i32* [[DEST:%.*]] to i8*
; CHECK-NEXT: [[BASE2:%.*]] = bitcast i32* [[BASE:%.*]] to i8*
-; CHECK-NEXT: [[TMP0:%.*]] = shl i64 [[SIZE:%.*]], 2, !dbg !18
+; CHECK-NEXT: [[TMP0:%.*]] = shl nuw i64 [[SIZE:%.*]], 2, !dbg !18
; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[DEST1]], i8* align 1 [[BASE2]], i64 [[TMP0]], i1 false), !dbg !19
; CHECK-NEXT: br label [[FOR_BODY:%.*]], !dbg !18
; CHECK: for.body:
Modified: llvm/trunk/test/Transforms/LoopReroll/basic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopReroll/basic.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/LoopReroll/basic.ll (original)
+++ llvm/trunk/test/Transforms/LoopReroll/basic.ll Thu Jun 6 01:56:26 2019
@@ -745,7 +745,7 @@ define void @pointer_bitcast_baseinst(i1
; CHECK-LABEL: @pointer_bitcast_baseinst(
; CHECK: bb3:
; CHECK-NEXT: %indvar = phi i64 [ %indvar.next, %bb3 ], [ 0, %bb ]
-; CHECK-NEXT: %4 = shl i64 %indvar, 3
+; CHECK-NEXT: %4 = shl nuw i64 %indvar, 3
; CHECK-NEXT: %5 = add i64 %4, 1
; CHECK-NEXT: %tmp5 = shl nuw i64 %5, 1
; CHECK-NEXT: %tmp6 = getelementptr i8, i8* %arg1, i64 %tmp5
Modified: llvm/trunk/test/Transforms/LoopReroll/complex_reroll.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopReroll/complex_reroll.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/LoopReroll/complex_reroll.ll (original)
+++ llvm/trunk/test/Transforms/LoopReroll/complex_reroll.ll Thu Jun 6 01:56:26 2019
@@ -104,7 +104,7 @@ while.body:
;CHECK-NEXT: %indvar = phi i64 [ %indvar.next, %while.body ], [ 0, %while.body.preheader ]
;CHECK-NEXT: %S.012 = phi i32 [ %add, %while.body ], [ undef, %while.body.preheader ]
;CHECK-NEXT: %4 = trunc i64 %indvar to i32
-;CHECK-NEXT: %5 = mul i64 %indvar, -1
+;CHECK-NEXT: %5 = mul nsw i64 %indvar, -1
;CHECK-NEXT: %scevgep = getelementptr i32, i32* %buf, i64 %5
;CHECK-NEXT: %6 = load i32, i32* %scevgep, align 4
;CHECK-NEXT: %add = add nsw i32 %6, %S.012
Modified: llvm/trunk/test/Transforms/LoopReroll/nonconst_lb.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopReroll/nonconst_lb.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/LoopReroll/nonconst_lb.ll (original)
+++ llvm/trunk/test/Transforms/LoopReroll/nonconst_lb.ll Thu Jun 6 01:56:26 2019
@@ -52,7 +52,7 @@ for.end:
; CHECK: %0 = add i32 %n, -1
; CHECK: %1 = sub i32 %0, %m
; CHECK: %2 = lshr i32 %1, 2
-; CHECK: %3 = shl i32 %2, 2
+; CHECK: %3 = shl nuw i32 %2, 2
; CHECK: %4 = add i32 %3, 3
; CHECK: br label %for.body
@@ -131,7 +131,7 @@ for.end:
; CHECK: %0 = add i32 %n, -1
; CHECK: %1 = sub i32 %0, %rem
; CHECK: %2 = lshr i32 %1, 2
-; CHECK: %3 = shl i32 %2, 2
+; CHECK: %3 = shl nuw i32 %2, 2
; CHECK: %4 = add i32 %3, 3
; CHECK: br label %for.body
Modified: llvm/trunk/test/Transforms/LoopReroll/ptrindvar.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopReroll/ptrindvar.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/LoopReroll/ptrindvar.ll (original)
+++ llvm/trunk/test/Transforms/LoopReroll/ptrindvar.ll Thu Jun 6 01:56:26 2019
@@ -52,7 +52,7 @@ while.body:
;CHECK-LABEL: while.body:
;CHECK-NEXT: %indvar = phi i64 [ %indvar.next, %while.body ], [ 0, %while.body.preheader ]
;CHECK-NEXT: %S.011 = phi i32 [ %add, %while.body ], [ undef, %while.body.preheader ]
-;CHECK-NEXT: %4 = mul i64 %indvar, -1
+;CHECK-NEXT: %4 = mul nsw i64 %indvar, -1
;CHECK-NEXT: %scevgep = getelementptr i32, i32* %buf, i64 %4
;CHECK-NEXT: %5 = load i32, i32* %scevgep, align 4
;CHECK-NEXT: %add = add nsw i32 %5, %S.011
Modified: llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll (original)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll Thu Jun 6 01:56:26 2019
@@ -12,8 +12,8 @@ target datalayout = "n8:16:32:64"
; CHECK-LABEL: @test(
; multiplies are hoisted out of the loop
; CHECK: while.body.lr.ph:
-; CHECK: shl i64
-; CHECK: shl i64
+; CHECK: shl nsw i64
+; CHECK: shl nsw i64
; GEPs are ugly
; CHECK: while.body:
; CHECK: phi
Modified: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-expand-quadratic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-expand-quadratic.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-expand-quadratic.ll (original)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/lsr-expand-quadratic.ll Thu Jun 6 01:56:26 2019
@@ -29,7 +29,7 @@ target triple = "x86_64-apple-macosx"
; CHECK-LABEL: for.end:
; CHECK: %tobool.us = icmp eq i32 %lsr.iv.next, 0
; CHECK: %sub.us = select i1 %tobool.us, i32 0, i32 0
-; CHECK: %0 = sub i32 0, %sub.us
+; CHECK: %0 = sub nuw nsw i32 0, %sub.us
; CHECK: %1 = sub i32 %0, %lsr.iv.next
; CHECK: %sext.us = mul i32 %lsr.iv.next2, %1
; CHECK: %f = ashr i32 %sext.us, 24
Modified: llvm/trunk/test/Transforms/LoopStrengthReduce/X86/nested-loop.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/X86/nested-loop.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/X86/nested-loop.ll (original)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/X86/nested-loop.ll Thu Jun 6 01:56:26 2019
@@ -14,7 +14,7 @@ define void @foo(i32 %size, i32 %nsteps,
; CHECK-NEXT: [[CMP215:%.*]] = icmp sgt i32 [[SIZE:%.*]], 1
; CHECK-NEXT: [[T0:%.*]] = zext i32 [[SIZE]] to i64
; CHECK-NEXT: [[T1:%.*]] = sext i32 [[NSTEPS:%.*]] to i64
-; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[T0]], -1
+; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[T0]], -1
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
; CHECK-NEXT: [[LSR_IV1:%.*]] = phi i64 [ [[LSR_IV_NEXT2:%.*]], [[FOR_INC:%.*]] ], [ 1, [[ENTRY:%.*]] ]
Modified: llvm/trunk/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll (original)
+++ llvm/trunk/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll Thu Jun 6 01:56:26 2019
@@ -8,7 +8,7 @@
; CHECK: [[r2:%[a-z0-9\.]+]] = lshr exact i64 [[r1]], 1
; CHECK: [[r3:%[a-z0-9\.]+]] = bitcast i64 [[r2]] to i64
; CHECK: for.body.lr.ph:
-; CHECK: [[r4:%[a-z0-9]+]] = shl i64 [[r3]], 1
+; CHECK: [[r4:%[a-z0-9]+]] = shl nuw i64 [[r3]], 1
; CHECK: br label %for.body
; CHECK: for.body:
; CHECK: %lsr.iv2 = phi i64 [ %lsr.iv.next, %for.body ], [ [[r4]], %for.body.lr.ph ]
Modified: llvm/trunk/test/Transforms/LoopVectorize/AArch64/pr36032.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/AArch64/pr36032.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/LoopVectorize/AArch64/pr36032.ll (original)
+++ llvm/trunk/test/Transforms/LoopVectorize/AArch64/pr36032.ll Thu Jun 6 01:56:26 2019
@@ -29,7 +29,7 @@ define void @_Z1dv() local_unnamed_addr
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP1]], 4
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
; CHECK: vector.scevcheck:
-; CHECK-NEXT: [[TMP2:%.*]] = sub i64 3, [[TMP0]]
+; CHECK-NEXT: [[TMP2:%.*]] = sub nsw i64 3, [[TMP0]]
; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[G_0]], [[CONV]]
; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP2]] to i32
; CHECK-NEXT: [[MUL:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 1, i32 [[TMP4]])
Modified: llvm/trunk/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll?rev=362687&r1=362686&r2=362687&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll (original)
+++ llvm/trunk/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll Thu Jun 6 01:56:26 2019
@@ -27,7 +27,7 @@ define void @foo(i32* nocapture %a, i32*
; CHECK: for.body3.lr.ph.us.preheader:
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[M]], -1
; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
-; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], 1
+; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1
; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[K:%.*]] to i64
; CHECK-NEXT: br label [[FOR_BODY3_LR_PH_US:%.*]]
; CHECK: for.end.us:
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