[llvm] r362677 - [AArch64][GlobalISel] Add the new changes to fix PR42129 that were supposed to go into r362666.

[Amara Emerson via llvm-commits]

Author: aemerson
Date: Thu Jun  6 00:33:47 2019
New Revision: 362677

URL: http://llvm.org/viewvc/llvm-project?rev=362677&view=rev
Log:
[AArch64][GlobalISel] Add the new changes to fix PR42129 that were supposed to go into r362666.

The changes weren't staged so ended up just re-commiting the unmodified reverted change.

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/fold-fp-select.mir

Modified: llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp?rev=362677&r1=362676&r2=362677&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp Thu Jun  6 00:33:47 2019
@@ -2854,6 +2854,11 @@ bool AArch64InstructionSelector::tryOptS
     if (Opc != TargetOpcode::COPY && Opc != TargetOpcode::G_TRUNC)
       break;
 
+    // Can't see past copies from physregs.
+    if (Opc == TargetOpcode::COPY &&
+        TargetRegisterInfo::isPhysicalRegister(CondDef->getOperand(1).getReg()))
+      return false;
+
     CondDef = MRI.getVRegDef(CondDef->getOperand(1).getReg());
   }
 

Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/fold-fp-select.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/fold-fp-select.mir?rev=362677&r1=362676&r2=362677&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/fold-fp-select.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/fold-fp-select.mir Thu Jun  6 00:33:47 2019
@@ -349,3 +349,35 @@ body:             |
     RET_ReallyLR implicit $d0
 
 ...
+---
+name:            copy_from_physreg
+alignment:       2
+legalized:       true
+regBankSelected: true
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $s0, $w0, $w1
+
+    ; CHECK-LABEL: name: copy_from_physreg
+    ; CHECK: liveins: $s0, $w0, $w1
+    ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
+    ; CHECK: [[COPY1:%[0-9]+]]:fpr32 = COPY $s0
+    ; CHECK: [[FMOVS0_:%[0-9]+]]:fpr32 = FMOVS0
+    ; CHECK: BL @copy_from_physreg, implicit-def $w0
+    ; CHECK: $wzr = ANDSWri [[COPY]], 0, implicit-def $nzcv
+    ; CHECK: [[FCSELSrrr:%[0-9]+]]:fpr32 = FCSELSrrr [[COPY1]], [[FMOVS0_]], 1, implicit $nzcv
+    ; CHECK: BL @copy_from_physreg, implicit-def $w0
+    ; CHECK: $s0 = COPY [[FCSELSrrr]]
+    ; CHECK: RET_ReallyLR implicit $s0
+    %0:gpr(s32) = COPY $w0
+    %1:fpr(s32) = COPY $s0
+    %5:fpr(s32) = G_FCONSTANT float 0.000000e+00
+    BL @copy_from_physreg, implicit-def $w0
+    %3:gpr(s1) = G_TRUNC %0(s32)
+    %4:fpr(s32) = G_SELECT %3(s1), %1, %5
+    BL @copy_from_physreg, implicit-def $w0
+    $s0 = COPY %4(s32)
+    RET_ReallyLR implicit $s0
+
+...